From ac9f0d2dd407caee306bcc695ce8c531e4325767 Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Mon, 14 Oct 2019 11:09:27 -0400 Subject: [PATCH] turnip: push constants Signed-off-by: Jonathan Marek Reviewed-by: Kristian H. Kristensen --- src/freedreno/vulkan/tu_cmd_buffer.c | 35 ++++++++++++++++++++-------- src/freedreno/vulkan/tu_private.h | 2 +- src/freedreno/vulkan/tu_shader.c | 24 +++++++++++++++++++ 3 files changed, 50 insertions(+), 11 deletions(-) diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c index 2680b4c8210..348acd79799 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.c +++ b/src/freedreno/vulkan/tu_cmd_buffer.c @@ -1772,6 +1772,8 @@ tu_CmdPushConstants(VkCommandBuffer commandBuffer, uint32_t size, const void *pValues) { + TU_FROM_HANDLE(tu_cmd_buffer, cmd_buffer, commandBuffer); + memcpy((void*) cmd_buffer->push_constants + offset, pValues, size); } VkResult @@ -2255,7 +2257,8 @@ tu6_stage2shadersb(gl_shader_stage type) static void tu6_emit_user_consts(struct tu_cs *cs, const struct tu_pipeline *pipeline, struct tu_descriptor_state *descriptors_state, - gl_shader_stage type) + gl_shader_stage type, + uint32_t *push_constants) { const struct tu_program_descriptor_linkage *link = &pipeline->program.link[type]; @@ -2263,7 +2266,6 @@ tu6_emit_user_consts(struct tu_cs *cs, const struct tu_pipeline *pipeline, for (uint32_t i = 0; i < ARRAY_SIZE(state->range); i++) { if (state->range[i].start < state->range[i].end) { - assert(i && i - 1 < link->ubo_map.num); uint32_t *ptr = map_get(descriptors_state, &link->ubo_map, i - 1); uint32_t size = state->range[i].end - state->range[i].start; @@ -2282,6 +2284,21 @@ tu6_emit_user_consts(struct tu_cs *cs, const struct tu_pipeline *pipeline, debug_assert((size % 16) == 0); debug_assert((offset % 16) == 0); + if (i == 0) { + /* push constants */ + tu_cs_emit_pkt7(cs, tu6_stage2opcode(type), 3 + (size / 4)); + tu_cs_emit(cs, CP_LOAD_STATE6_0_DST_OFF(state->range[i].offset / 16) | + CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) | + CP_LOAD_STATE6_0_STATE_SRC(SS6_DIRECT) | + CP_LOAD_STATE6_0_STATE_BLOCK(tu6_stage2shadersb(type)) | + CP_LOAD_STATE6_0_NUM_UNIT(size / 16)); + tu_cs_emit(cs, 0); + tu_cs_emit(cs, 0); + for (unsigned i = 0; i < size / 4; i++) + tu_cs_emit(cs, push_constants[i + offset / 4]); + continue; + } + tu_cs_emit_pkt7(cs, tu6_stage2opcode(type), 3); tu_cs_emit(cs, CP_LOAD_STATE6_0_DST_OFF(state->range[i].offset / 16) | CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) | @@ -2329,18 +2346,18 @@ tu6_emit_ubos(struct tu_cs *cs, const struct tu_pipeline *pipeline, } static struct tu_cs_entry -tu6_emit_consts(struct tu_device *device, struct tu_cs *draw_state, +tu6_emit_consts(struct tu_cmd_buffer *cmd, const struct tu_pipeline *pipeline, struct tu_descriptor_state *descriptors_state, gl_shader_stage type) { struct tu_cs cs; - tu_cs_begin_sub_stream(device, draw_state, 512, &cs); /* TODO: maximum size? */ + tu_cs_begin_sub_stream(cmd->device, &cmd->draw_state, 512, &cs); /* TODO: maximum size? */ - tu6_emit_user_consts(&cs, pipeline, descriptors_state, type); + tu6_emit_user_consts(&cs, pipeline, descriptors_state, type, cmd->push_constants); tu6_emit_ubos(&cs, pipeline, descriptors_state, type); - return tu_cs_end_sub_stream(draw_state, &cs); + return tu_cs_end_sub_stream(&cmd->draw_state, &cs); } static struct tu_cs_entry @@ -2603,15 +2620,13 @@ tu6_bind_draw_states(struct tu_cmd_buffer *cmd, (struct tu_draw_state_group) { .id = TU_DRAW_STATE_VS_CONST, .enable_mask = 0x7, - .ib = tu6_emit_consts(cmd->device, &cmd->draw_state, pipeline, - descriptors_state, MESA_SHADER_VERTEX) + .ib = tu6_emit_consts(cmd, pipeline, descriptors_state, MESA_SHADER_VERTEX) }; draw_state_groups[draw_state_group_count++] = (struct tu_draw_state_group) { .id = TU_DRAW_STATE_FS_CONST, .enable_mask = 0x6, - .ib = tu6_emit_consts(cmd->device, &cmd->draw_state, pipeline, - descriptors_state, MESA_SHADER_FRAGMENT) + .ib = tu6_emit_consts(cmd, pipeline, descriptors_state, MESA_SHADER_FRAGMENT) }; draw_state_groups[draw_state_group_count++] = (struct tu_draw_state_group) { diff --git a/src/freedreno/vulkan/tu_private.h b/src/freedreno/vulkan/tu_private.h index 5d3c1deedfc..8db813ad778 100644 --- a/src/freedreno/vulkan/tu_private.h +++ b/src/freedreno/vulkan/tu_private.h @@ -922,7 +922,7 @@ struct tu_cmd_buffer struct tu_vertex_binding vertex_bindings[MAX_VBS]; uint32_t queue_family_index; - uint8_t push_constants[MAX_PUSH_CONSTANTS_SIZE]; + uint32_t push_constants[MAX_PUSH_CONSTANTS_SIZE / 4]; VkShaderStageFlags push_constant_stages; struct tu_descriptor_set meta_push_descriptors; diff --git a/src/freedreno/vulkan/tu_shader.c b/src/freedreno/vulkan/tu_shader.c index 7a05a115269..8f09fbb03b9 100644 --- a/src/freedreno/vulkan/tu_shader.c +++ b/src/freedreno/vulkan/tu_shader.c @@ -225,6 +225,26 @@ static bool lower_intrinsic(nir_builder *b, nir_intrinsic_instr *instr, struct tu_shader *shader) { + if (instr->intrinsic == nir_intrinsic_load_push_constant) { + /* note: ir3 wants load_ubo, not load_uniform */ + assert(nir_intrinsic_base(instr) == 0); + + nir_intrinsic_instr *load = + nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_ubo); + load->num_components = instr->num_components; + load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0)); + load->src[1] = instr->src[0]; + nir_ssa_dest_init(&load->instr, &load->dest, + load->num_components, instr->dest.ssa.bit_size, + instr->dest.ssa.name); + nir_builder_instr_insert(b, &load->instr); + nir_ssa_def_rewrite_uses(&instr->dest.ssa, nir_src_for_ssa(&load->dest.ssa)); + + nir_instr_remove(&instr->instr); + + return true; + } + if (instr->intrinsic != nir_intrinsic_vulkan_resource_index) return false; @@ -261,6 +281,7 @@ lower_impl(nir_function_impl *impl, struct tu_shader *shader) nir_foreach_block(block, impl) { nir_foreach_instr_safe(instr, block) { + b.cursor = nir_before_instr(instr); switch (instr->type) { case nir_instr_type_tex: progress |= lower_sampler(&b, nir_instr_as_tex(instr), shader); @@ -402,6 +423,9 @@ tu_shader_create(struct tu_device *dev, nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); + /* num_uniforms only used by ir3 for size of ubo 0 (push constants) */ + nir->num_uniforms = MAX_PUSH_CONSTANTS_SIZE / 16; + shader->ir3_shader.compiler = dev->compiler; shader->ir3_shader.type = stage; shader->ir3_shader.nir = nir; -- 2.30.2