From acf232eef710e74263728e3ba2f93bf0dfc3e5cc Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 5 Jul 2022 18:19:29 +0100 Subject: [PATCH] add note about bug #884 new reg vector naming convention --- src/openpower/sv/trans/svp64.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index c7b01721..9efcf1c9 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -468,6 +468,8 @@ def decode_ffirst(encoding): def decode_reg(field): # decode the field number. "5.v" or "3.s" or "9" + # and now also "*0", and "*%0". note: *NOT* to add "*%rNNN" etc. + # https://bugs.libre-soc.org/show_bug.cgi?id=884#c0 field = field.split(".") regmode = 'scalar' # default if len(field) == 2: -- 2.30.2