From ad11ba78f54be40d684c369817bff2beefbd71d9 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Sun, 14 Feb 2021 19:49:02 -0300 Subject: [PATCH] Show traces for the register numbers of the current instruction Will make it easier to follow the vector loop, when it begins to increment them. --- src/soc/simple/test/test_runner.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/soc/simple/test/test_runner.py b/src/soc/simple/test/test_runner.py index 7bcaa1ab..add184fb 100644 --- a/src/soc/simple/test/test_runner.py +++ b/src/soc/simple/test/test_runner.py @@ -312,7 +312,9 @@ class TestRunner(FHDLTestCase): 'cia[63:0]', 'nia[63:0]', 'pc[63:0]', 'raw_insn_i[31:0]', 'raw_opcode_in[31:0]', 'insn_type', {'comment': 'issue and execute'}, - 'core.core_core_insn_type', 'issue_i', 'busy_o', + 'core.core_core_insn_type', + 'core_reg1[6:0]', 'core_reg2[6:0]', 'core_rego[6:0]', + 'issue_i', 'busy_o', {'comment': 'dmi'}, 'dbg.dmi_req_i', 'dbg.dmi_ack_o', {'comment': 'instruction memory'}, @@ -340,4 +342,3 @@ class TestRunner(FHDLTestCase): sim.add_sync_process(process) with sim.write_vcd("issuer_simulator.vcd"): sim.run() - -- 2.30.2