From ad7671eb278394e0a2ee129a833a69455bebfa8c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 27 Jun 2019 09:46:53 +0100 Subject: [PATCH] rename sub offsets --- riscv/insn_template_sv.cc | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/riscv/insn_template_sv.cc b/riscv/insn_template_sv.cc index b47cc7d..7b38593 100644 --- a/riscv/insn_template_sv.cc +++ b/riscv/insn_template_sv.cc @@ -57,14 +57,14 @@ reg_t sv_proc_t::FN(processor_t* p, insn_t s_insn, reg_t pc) reg_t dest_pred = ~0x0; bool dest_pset = false; int *dest_offs = &(p->get_state()->sv().destoffs); - int *sub_doffs = &(p->get_state()->sv().dsvoffs); + int *dest_subo = &(p->get_state()->sv().dsvoffs); bool zeroing = false; #ifdef INSN_CATEGORY_TWINPREDICATION reg_t src_preg = 0; reg_t src_pred = ~0x0; bool src_pset = false; int *src_offs = &(p->get_state()->sv().srcoffs); - int *ssv_offs = &(p->get_state()->sv().ssvoffs); + int *src_subo = &(p->get_state()->sv().ssvoffs); bool zeroingsrc = false; #endif #ifdef INSN_TYPE_BRANCH @@ -181,7 +181,7 @@ reg_t sv_proc_t::FN(processor_t* p, insn_t s_insn, reg_t pc) // skip over masked-out elements in the src reg while ((src_pset = (src_pred & (1<= vlen) { break; } @@ -192,7 +192,7 @@ reg_t sv_proc_t::FN(processor_t* p, insn_t s_insn, reg_t pc) // skip over masked-out elements in the dest reg while ((dest_pset = (dest_pred & (1<= vlen) { break; } @@ -284,9 +284,9 @@ reg_t sv_proc_t::FN(processor_t* p, insn_t s_insn, reg_t pc) break; } #ifdef INSN_CATEGORY_TWINPREDICATION - inc_offs(vlen, subvl, *src_offs, *ssv_offs); + inc_offs(vlen, subvl, *src_offs, *src_subo); #endif - inc_offs(vlen, subvl, *dest_offs, *sub_doffs); + inc_offs(vlen, subvl, *dest_offs, *dest_subo); } #ifdef INSN_TYPE_BRANCH // ok, at the end of the loop, if the predicates are equal, -- 2.30.2