From ada223ba7280fae80365f36ac75f44bdb4880cc0 Mon Sep 17 00:00:00 2001
From: Shriya Sharma <shriya@redsemiconductor.com>
Date: Tue, 26 Sep 2023 12:02:17 +0100
Subject: [PATCH] Added brackets for lhzx instruction

---
 openpower/isa/fixedload.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn
index 649fa04c..30bcb3ef 100644
--- a/openpower/isa/fixedload.mdwn
+++ b/openpower/isa/fixedload.mdwn
@@ -160,7 +160,7 @@ Description:
 
     Let the effective address (EA) be the sum
     (RA|0)+ (RB). The halfword in storage addressed by
-    EA is loaded into RT 48:63. RT 0:47 are set to 0.
+    EA is loaded into RT[48:63]. RT 0:47 are set to 0.
 
 Special Registers Altered:
 
-- 
2.30.2