From ae3d45685512b75f878eb9d7917680fc3971988e Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Wed, 23 Feb 2011 15:10:49 -0600 Subject: [PATCH] ARM: Fix bug that let two table walks occur in parallel. --- src/arch/arm/table_walker.cc | 8 +++----- src/arch/arm/tlb.cc | 4 +++- src/cpu/o3/commit_impl.hh | 2 ++ 3 files changed, 8 insertions(+), 6 deletions(-) diff --git a/src/arch/arm/table_walker.cc b/src/arch/arm/table_walker.cc index e6dd728dd..e2207e26b 100644 --- a/src/arch/arm/table_walker.cc +++ b/src/arch/arm/table_walker.cc @@ -141,12 +141,12 @@ TableWalker::walk(RequestPtr _req, ThreadContext *_tc, uint8_t _cid, TLB::Mode _ if (!currState->timing) return processWalk(); - if (pending) { + if (pending || pendingQueue.size()) { pendingQueue.push_back(currState); currState = NULL; } else { pending = true; - processWalk(); + return processWalk(); } return NoFault; @@ -194,10 +194,8 @@ TableWalker::processWalk() f = tlb->walkTrickBoxCheck(l1desc_addr, currState->vaddr, sizeof(uint32_t), currState->isFetch, currState->isWrite, 0, true); if (f) { + DPRINTF(TLB, "Trickbox check caused fault on %#x\n", currState->vaddr); if (currState->timing) { - currState->transState->finish(f, currState->req, - currState->tc, currState->mode); - pending = false; nextWalk(currState->tc); currState = NULL; diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 230c56200..f1c8ae41a 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -529,7 +529,7 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, vaddr, contextId); fault = tableWalker->walk(req, tc, contextId, mode, translation, timing); - if (timing) { + if (timing && fault == NoFault) { delay = true; // for timing mode, return and wait for table walk return fault; @@ -694,6 +694,8 @@ TLB::translateTiming(RequestPtr req, ThreadContext *tc, #else fault = translateSe(req, tc, mode, translation, delay, true); #endif + DPRINTF(TLB, "Translation returning delay=%d fault=%d\n", delay, fault != + NoFault); if (!delay) translation->finish(fault, req, tc, mode); else diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 50c08e162..01e235722 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -1142,6 +1142,8 @@ DefaultCommit::commitHead(DynInstPtr &head_inst, unsigned inst_num) commitStatus[tid] = TrapPending; + DPRINTF(Commit, "Committing instruction with fault [sn:%lli]\n", + head_inst->seqNum); if (head_inst->traceData) { if (DTRACE(ExecFaulting)) { head_inst->traceData->setFetchSeq(head_inst->seqNum); -- 2.30.2