From ae59e00d17e296ccdaa5829ced97342bcf09971d Mon Sep 17 00:00:00 2001 From: Ramana Radhakrishnan Date: Tue, 12 Apr 2011 13:42:48 +0000 Subject: [PATCH] re PR target/48090 (gcc 4.5.2 miscompilation when building on arm) Fix PR target/48090 2011-04-12 Ramana Radhakrishnan PR target/48090 * config/arm/arm.md (*arm_negdi2): Fix early clobber constraints. From-SVN: r172318 --- gcc/ChangeLog | 5 +++++ gcc/config/arm/arm.md | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a1ec50bbc3..6c130b3b3ec 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2011-04-12 Ramana Radhakrishnan + + PR target/48090 + * config/arm/arm.md (*arm_negdi2): Fix early clobber constraints. + 2011-04-12 Richard Sandiford * recog.h (insn_operand_data): Add an "allows_mem" field. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index e703a73fba0..5e7b4023d12 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3696,7 +3696,7 @@ ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). ;; The first alternative allows the common case of a *full* overlap. (define_insn "*arm_negdi2" - [(set (match_operand:DI 0 "s_register_operand" "=&r,r") + [(set (match_operand:DI 0 "s_register_operand" "=r,&r") (neg:DI (match_operand:DI 1 "s_register_operand" "0,r"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" -- 2.30.2