From aeae40fcbcad40373a9eb49f9fbfda9b119abdbc Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 27 Apr 2022 16:04:23 +0100 Subject: [PATCH] --- openpower/sv/biginteger/analysis.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn index 00ca404ef..febdf75e7 100644 --- a/openpower/sv/biginteger/analysis.mdwn +++ b/openpower/sv/biginteger/analysis.mdwn @@ -123,7 +123,7 @@ vector data offset by one. Given that all three instructions it is possible to reference the full 128 64-bit registers (r0-r127): subfic t1, t0, 64 # compute 64-s (s in t0) - sv.srd r8.v, r24.v, t0 # shift all of r24.v up by s, store in r8 + sv.srd r8.v, r24.v, t0 # shift each element of r24.v up by s sv.sld r16.v, r25.v, t1 # offset start of vector by one (r25) sv.or r8.v, r8.v, r16.v # OR two parts together -- 2.30.2