From aeb4f16e5a82405fcacb67b8f237deb87ce9b291 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Fri, 27 Oct 2023 11:44:32 +0100 Subject: [PATCH] added english language description for ldsux instruction --- openpower/isa/fixedloadshift.mdwn | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn index f7df8135..4423123a 100644 --- a/openpower/isa/fixedloadshift.mdwn +++ b/openpower/isa/fixedloadshift.mdwn @@ -321,6 +321,17 @@ Pseudo-code: RT <- MEM(EA, 8) RA <- EA +Description: + + Let the effective address (EA) be the sum of the contents of + register RB shifted by (SH+1), and (RA). + + The doubleword in storage addressed by EA is loaded into RT. + + EA is placed into register RA. + + If RA=0 or RA=RT, the instruction form is invalid. + Special Registers Altered: None -- 2.30.2