From aec530ac44bb5f96f1f3c63a43c53e5d5b9b5412 Mon Sep 17 00:00:00 2001 From: Steve Ellcey Date: Tue, 5 Jun 2018 22:21:36 +0000 Subject: [PATCH] re PR target/79924 (aarch64: untranslated diagnostics in aarch64_err_no_fpadvsimd) 2018-06-05 Steve Ellcey PR target/79924 * gcc.target/aarch64/mgeneral-regs_1.c: Update error message. * gcc.target/aarch64/mgeneral-regs_2.c: Ditto. * gcc.target/aarch64/mgeneral-regs_3.c: Ditto. * gcc.target/aarch64/nofp_1.c: Ditto. From-SVN: r261218 --- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c | 3 +-- gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/nofp_1.c | 2 +- 5 files changed, 12 insertions(+), 5 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 26ea1148bfd..22ed1e03f22 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2018-06-05 Steve Ellcey + + PR target/79924 + * gcc.target/aarch64/mgeneral-regs_1.c: Update error message. + * gcc.target/aarch64/mgeneral-regs_2.c: Ditto. + * gcc.target/aarch64/mgeneral-regs_3.c: Ditto. + * gcc.target/aarch64/nofp_1.c: Ditto. + 2018-06-05 Andre Vieira * gcc.target/arm/cmse/cmse-1c99.c: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c index 1656db5a1bc..336402ead84 100644 --- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c +++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c @@ -2,8 +2,7 @@ typedef int int32x2_t __attribute__ ((__vector_size__ ((8)))); -/* { dg-error "'-mgeneral-regs-only' is incompatible with vector return type" "" {target "aarch64*-*-*"} .+2 } */ -/* { dg-error "'-mgeneral-regs-only' is incompatible with vector argument" "" {target "aarch64*-*-*"} .+1 } */ +/* { dg-error "'-mgeneral-regs-only' is incompatible with the use of vector types" "" {target "aarch64*-*-*"} .+1 } */ int32x2_t test (int32x2_t a, int32x2_t b) { return a + b; diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c index 859019970ae..6e06a9f3225 100644 --- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c +++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_2.c @@ -10,6 +10,6 @@ test (int i, ...) va_list argp; va_start (argp, i); int32x2_t x = (int32x2_t) {0, 1}; - x += va_arg (argp, int32x2_t); /* { dg-error "'-mgeneral-regs-only' is incompatible with vector varargs" } */ + x += va_arg (argp, int32x2_t); /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of vector types" } */ return x[0] + x[1]; } diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c index f6b5fbae70b..fa6299960e7 100644 --- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c +++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_3.c @@ -5,7 +5,7 @@ extern void abort (void); int test (int i, ...) { - float f = (float) i; /* { dg-error "'-mgeneral-regs-only' is incompatible with floating-point code" } */ + float f = (float) i; /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of floating-point types" } */ if (f != f) abort (); return 2; } diff --git a/gcc/testsuite/gcc.target/aarch64/nofp_1.c b/gcc/testsuite/gcc.target/aarch64/nofp_1.c index 3fc00368668..f8adc62d2b0 100644 --- a/gcc/testsuite/gcc.target/aarch64/nofp_1.c +++ b/gcc/testsuite/gcc.target/aarch64/nofp_1.c @@ -15,5 +15,5 @@ main (int argc, char **argv) { int32x2_t a = (int32x2_t) {0, 1}; int32x2_t b = (int32x2_t) {2, 3}; - return test (2, a, b); /* { dg-error "'\\+nofp' feature modifier is incompatible with vector argument" } */ + return test (2, a, b); /* { dg-error "'\\+nofp' feature modifier is incompatible with the use of vector types" } */ } -- 2.30.2