From af7ee8bfa91b92e0357687808979175f511bacc3 Mon Sep 17 00:00:00 2001 From: Chris Demetriou Date: Tue, 31 Dec 2002 07:29:29 +0000 Subject: [PATCH] [ bfd/ChangeLog ] 2002-12-30 Chris Demetriou * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate. --- bfd/ChangeLog | 14 + bfd/aoutx.h | 1 + bfd/archures.c | 1 + bfd/bfd-in2.h | 1 + bfd/cpu-mips.c | 2 + bfd/elfxx-mips.c | 19 +- binutils/ChangeLog | 5 + binutils/doc/binutils.texi | 10 +- gas/ChangeLog | 26 ++ gas/config/tc-mips.c | 184 ++++++++-- gas/configure | 365 ++++++++++---------- gas/configure.in | 8 + gas/doc/as.texinfo | 10 +- gas/doc/c-mips.texi | 6 +- gas/testsuite/ChangeLog | 13 + gas/testsuite/gas/mips/cp0-names-mips32r2.d | 42 +++ gas/testsuite/gas/mips/hwr-names-mips32r2.d | 43 +++ gas/testsuite/gas/mips/hwr-names-numeric.d | 43 +++ gas/testsuite/gas/mips/hwr-names.s | 44 +++ gas/testsuite/gas/mips/mips.exp | 11 + gas/testsuite/gas/mips/mips32r2-ill.l | 15 + gas/testsuite/gas/mips/mips32r2-ill.s | 60 ++++ gas/testsuite/gas/mips/mips32r2.d | 46 +++ gas/testsuite/gas/mips/mips32r2.s | 81 +++++ include/elf/ChangeLog | 4 + include/elf/mips.h | 3 + include/opcode/ChangeLog | 8 + include/opcode/mips.h | 24 +- opcodes/ChangeLog | 28 ++ opcodes/mips-dis.c | 163 +++++++-- opcodes/mips-opc.c | 40 ++- 31 files changed, 1053 insertions(+), 267 deletions(-) create mode 100644 gas/testsuite/gas/mips/cp0-names-mips32r2.d create mode 100644 gas/testsuite/gas/mips/hwr-names-mips32r2.d create mode 100644 gas/testsuite/gas/mips/hwr-names-numeric.d create mode 100644 gas/testsuite/gas/mips/hwr-names.s create mode 100644 gas/testsuite/gas/mips/mips32r2-ill.l create mode 100644 gas/testsuite/gas/mips/mips32r2-ill.s create mode 100644 gas/testsuite/gas/mips/mips32r2.d create mode 100644 gas/testsuite/gas/mips/mips32r2.s diff --git a/bfd/ChangeLog b/bfd/ChangeLog index b2a283a9f2b..b58e0d5077d 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,17 @@ +2002-12-30 Chris Demetriou + + * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. + * archures.c (bfd_mach_mipsisa32r2): New define. + * bfd-in2.h: Regenerate. + * cpu-mips.c (I_mipsisa32r2): New enum value. + (arch_info_struct): Add entry for I_mipsisa32r2. + * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) + (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. + (_bfd_mips_elf_final_write_processing): Add + bfd_mach_mipsisa32r2 case. + (_bfd_mips_elf_merge_private_bfd_data): Handle merging of + binaries marked as using MIPS32 Release 2. + 2002-12-30 Dmitry Diky * Makefile.am: Add msp430 target. diff --git a/bfd/aoutx.h b/bfd/aoutx.h index d8b465c47b8..998bca76230 100644 --- a/bfd/aoutx.h +++ b/bfd/aoutx.h @@ -800,6 +800,7 @@ NAME(aout,machine_type) (arch, machine, unknown) case bfd_mach_mips12000: case bfd_mach_mips16: case bfd_mach_mipsisa32: + case bfd_mach_mipsisa32r2: case bfd_mach_mips5: case bfd_mach_mipsisa64: case bfd_mach_mips_sb1: diff --git a/bfd/archures.c b/bfd/archures.c index 2ad7267b353..4c93cda6aa0 100644 --- a/bfd/archures.c +++ b/bfd/archures.c @@ -145,6 +145,7 @@ DESCRIPTION .#define bfd_mach_mips5 5 .#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *} .#define bfd_mach_mipsisa32 32 +.#define bfd_mach_mipsisa32r2 33 .#define bfd_mach_mipsisa64 64 . bfd_arch_i386, {* Intel 386 *} .#define bfd_mach_i386_i386 1 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index c72767982ee..cdcf7ae7622 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1572,6 +1572,7 @@ enum bfd_architecture #define bfd_mach_mips5 5 #define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ #define bfd_mach_mipsisa32 32 +#define bfd_mach_mipsisa32r2 33 #define bfd_mach_mipsisa64 64 bfd_arch_i386, /* Intel 386 */ #define bfd_mach_i386_i386 1 diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c index e587535e28b..13355c5c5af 100644 --- a/bfd/cpu-mips.c +++ b/bfd/cpu-mips.c @@ -82,6 +82,7 @@ enum I_mips16, I_mips5, I_mipsisa32, + I_mipsisa32r2, I_mipsisa64, I_sb1, }; @@ -111,6 +112,7 @@ static const bfd_arch_info_type arch_info_struct[] = N (64, 64, bfd_mach_mips16, "mips:16", FALSE, NN(I_mips16)), N (64, 64, bfd_mach_mips5, "mips:mips5", FALSE, NN(I_mips5)), N (32, 32, bfd_mach_mipsisa32, "mips:isa32", FALSE, NN(I_mipsisa32)), + N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)), N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)), N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0), }; diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 80a583bc60f..ca79c64b98b 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -3102,6 +3102,8 @@ elf_mips_isa (flags) return 32; case E_MIPS_ARCH_64: return 64; + case E_MIPS_ARCH_32R2: + return 33; } return 4; } @@ -3172,6 +3174,10 @@ _bfd_elf_mips_mach (flags) case E_MIPS_ARCH_64: return bfd_mach_mipsisa64; break; + + case E_MIPS_ARCH_32R2: + return bfd_mach_mipsisa32r2; + break; } } @@ -6047,6 +6053,11 @@ _bfd_mips_elf_final_write_processing (abfd, linker) case bfd_mach_mipsisa64: val = E_MIPS_ARCH_64; + break; + + case bfd_mach_mipsisa32r2: + val = E_MIPS_ARCH_32R2; + break; } elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH); @@ -7854,8 +7865,10 @@ _bfd_mips_elf_merge_private_bfd_data (ibfd, obfd) using 64-bit ISAs. They will normally use the same data sizes and calling conventions. */ - if (( (new_isa == 1 || new_isa == 2 || new_isa == 32) - ^ (old_isa == 1 || old_isa == 2 || old_isa == 32)) != 0) + if (( (new_isa == 1 || new_isa == 2 || new_isa == 32 + || new_isa == 33) + ^ (old_isa == 1 || old_isa == 2 || old_isa == 32 + || old_isa == 33)) != 0) { (*_bfd_error_handler) (_("%s: ISA mismatch (-mips%d) with previous modules (-mips%d)"), @@ -8005,6 +8018,8 @@ _bfd_mips_elf_print_private_bfd_data (abfd, ptr) fprintf (file, _(" [mips32]")); else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_64) fprintf (file, _(" [mips64]")); + else if ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == E_MIPS_ARCH_32R2) + fprintf (file, _(" [mips32r2]")); else fprintf (file, _(" [unknown ISA]")); diff --git a/binutils/ChangeLog b/binutils/ChangeLog index c5dbf952902..97a03393108 100644 --- a/binutils/ChangeLog +++ b/binutils/ChangeLog @@ -1,3 +1,8 @@ +2002-12-30 Chris Demetriou + + * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) + changes in MIPS -M options. + 2002-12-30 Dmitry Diky * Makefile.am: Add msp430 target. diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi index ef96447f653..a1ca1547dcb 100644 --- a/binutils/doc/binutils.texi +++ b/binutils/doc/binutils.texi @@ -1621,12 +1621,18 @@ as appropriate for the CPU or architecture specified by @var{ARCH}. By default, CP0 register names are selected according to the architecture and CPU of the binary being disassembled. +@item hwr-names=@var{ARCH} +Print HWR (hardware register, used by the @code{rdhwr} instruction) names +as appropriate for the CPU or architecture specified by +@var{ARCH}. By default, HWR names are selected according to +the architecture and CPU of the binary being disassembled. + @item reg-names=@var{ABI} Print GPR and FPR names as appropriate for the selected ABI. @item reg-names=@var{ARCH} -Print CPU-specific register names (i.e., only the CP0 register names, -for now) as appropriate for the selected CPU or architecture. +Print CPU-specific register names (CP0 register and HWR names) +as appropriate for the selected CPU or architecture. @end table For any of the options listed above, @var{ABI} or diff --git a/gas/ChangeLog b/gas/ChangeLog index b24dcfe651d..19d6a603a33 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,29 @@ +2002-12-30 Chris Demetriou + + * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and + CPU variants. + * configure: Regenerate. + * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. + (macro_build): Handle "K" operand. + (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where + CPU_HAS_DROR and CPU_HAS_ROR are currently used. + (mips_ip): New variable "lastpos", and implement "+A", "+B", + and "+C" operands for MIPS32 Release 2 ins/ext instructions. + Implement "K" operand for MIPS32 Release 2 rdhwr instruction. + (validate_mips_insn): Implement "+" as a way to extend the + allowed operands, and implement "K", "+A", "+B", and "+C" + operands. + (OPTION_MIPS32R2): New define. + (md_longopts): Add entry for OPTION_MIPS32R2. + (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. + (md_parse_option): Handle OPTION_MIPS32R2. + (s_mipsset): Reimplement handling of ".set mipsN" options + and add support for ".set mips32r2". + (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). + (md_show_usage): Document "-mips32r2" option. + * doc/as.texinfo: Document "-mips32r2" option. + * doc/c-mips.texi: Likewise. + 2002-12-30 Dmitry Diky * configure.in: Add msp430 target. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 2a2f11c69c2..b501c19986d 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -260,6 +260,18 @@ static int mips_32bitmode = 0; || (ISA) == ISA_MIPS64 \ ) +/* Return true if ISA supports 64-bit right rotate (dror et al.) + instructions. */ +#define ISA_HAS_DROR(ISA) ( \ + 0 \ + ) + +/* Return true if ISA supports 32-bit right rotate (ror et al.) + instructions. */ +#define ISA_HAS_ROR(ISA) ( \ + (ISA) == ISA_MIPS32R2 \ + ) + #define HAVE_32BIT_GPRS \ (mips_opts.gp32 || ! ISA_HAS_64BIT_REGS (mips_opts.isa)) @@ -3010,6 +3022,7 @@ macro_build (place, counter, ep, name, fmt, va_alist) case 'd': case 'G': + case 'K': insn.insn_opcode |= va_arg (args, int) << OP_SH_RD; continue; @@ -6940,7 +6953,7 @@ macro2 (ip) break; case M_DROL: - if (CPU_HAS_DROR (mips_arch)) + if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_arch)) { if (dreg == sreg) { @@ -6971,7 +6984,7 @@ macro2 (ip) break; case M_ROL: - if (CPU_HAS_ROR (mips_arch)) + if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_arch)) { if (dreg == sreg) { @@ -7009,7 +7022,7 @@ macro2 (ip) if (imm_expr.X_op != O_constant) as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x3f; - if (CPU_HAS_DROR (mips_arch)) + if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_arch)) { rot = (64 - rot) & 0x3f; if (rot >= 32) @@ -7045,7 +7058,7 @@ macro2 (ip) if (imm_expr.X_op != O_constant) as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x1f; - if (CPU_HAS_ROR (mips_arch)) + if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_arch)) { macro_build ((char *) NULL, &icnt, NULL, "ror", "d,w,<", dreg, sreg, (32 - rot) & 0x1f); @@ -7067,7 +7080,7 @@ macro2 (ip) break; case M_DROR: - if (CPU_HAS_DROR (mips_arch)) + if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_arch)) { macro_build ((char *) NULL, &icnt, NULL, "drorv", "d,t,s", dreg, sreg, treg); @@ -7084,7 +7097,7 @@ macro2 (ip) break; case M_ROR: - if (CPU_HAS_ROR (mips_arch)) + if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_arch)) { macro_build ((char *) NULL, &icnt, NULL, "rorv", "d,t,s", dreg, sreg, treg); @@ -7108,7 +7121,7 @@ macro2 (ip) if (imm_expr.X_op != O_constant) as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x3f; - if (CPU_HAS_DROR (mips_arch)) + if (ISA_HAS_DROR (mips_opts.isa) || CPU_HAS_DROR (mips_arch)) { if (rot >= 32) macro_build ((char *) NULL, &icnt, NULL, "dror32", @@ -7143,7 +7156,7 @@ macro2 (ip) if (imm_expr.X_op != O_constant) as_bad (_("Improper rotate count")); rot = imm_expr.X_add_number & 0x1f; - if (CPU_HAS_ROR (mips_arch)) + if (ISA_HAS_ROR (mips_opts.isa) || CPU_HAS_ROR (mips_arch)) { macro_build ((char *) NULL, &icnt, NULL, "ror", "d,w,<", dreg, sreg, rot); @@ -8003,6 +8016,18 @@ validate_mips_insn (opc) case ',': break; case '(': break; case ')': break; + case '+': + switch (c = *p++) + { + case 'A': USE_BITS (OP_MASK_SHAMT, OP_SH_SHAMT); break; + case 'B': USE_BITS (OP_MASK_INSMSB, OP_SH_INSMSB); break; + case 'C': USE_BITS (OP_MASK_EXTMSBD, OP_SH_EXTMSBD); break; + default: + as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"), + c, opc->name, opc->args); + return 0; + } + break; case '<': USE_BITS (OP_MASK_SHAMT, OP_SH_SHAMT); break; case '>': USE_BITS (OP_MASK_SHAMT, OP_SH_SHAMT); break; case 'A': break; @@ -8015,6 +8040,7 @@ validate_mips_insn (opc) case 'H': USE_BITS (OP_MASK_SEL, OP_SH_SEL); break; case 'I': break; case 'J': USE_BITS (OP_MASK_CODE19, OP_SH_CODE19); break; + case 'K': USE_BITS (OP_MASK_RD, OP_SH_RD); break; case 'L': break; case 'M': USE_BITS (OP_MASK_CCC, OP_SH_CCC); break; case 'N': USE_BITS (OP_MASK_BCC, OP_SH_BCC); break; @@ -8089,6 +8115,7 @@ mips_ip (str, ip) char *argsStart; unsigned int regno; unsigned int lastregno = 0; + unsigned int lastpos = 0; char *s_reset; char save_c = 0; @@ -8254,6 +8281,70 @@ mips_ip (str, ip) continue; break; + case '+': /* Opcode extension character. */ + switch (*++args) + { + case 'A': /* ins/ext "pos". */ + my_getExpression (&imm_expr, s); + check_absolute_expr (ip, &imm_expr); + if ((unsigned long) imm_expr.X_add_number > 31) + { + as_bad (_("Improper position (%lu)"), + (unsigned long) imm_expr.X_add_number); + imm_expr.X_add_number = 0; + } + lastpos = imm_expr.X_add_number; + ip->insn_opcode |= lastpos << OP_SH_SHAMT; + imm_expr.X_op = O_absent; + s = expr_end; + continue; + + case 'B': /* "ins" size spec (becomes MSB). */ + my_getExpression (&imm_expr, s); + check_absolute_expr (ip, &imm_expr); + if (imm_expr.X_add_number == 0 + || (unsigned long) imm_expr.X_add_number > 32 + || ((unsigned long) imm_expr.X_add_number + + lastpos) > 32) + { + as_bad (_("Improper insert size (%lu, position %lu)"), + (unsigned long) imm_expr.X_add_number, + (unsigned long) lastpos); + imm_expr.X_add_number &= OP_MASK_INSMSB; + } + ip->insn_opcode |= (lastpos + imm_expr.X_add_number + - 1) << OP_SH_INSMSB; + imm_expr.X_op = O_absent; + s = expr_end; + continue; + + case 'C': /* "ext" size spec (becomes MSBD). */ + my_getExpression (&imm_expr, s); + check_absolute_expr (ip, &imm_expr); + if (imm_expr.X_add_number == 0 + || (unsigned long) imm_expr.X_add_number > 32 + || ((unsigned long) imm_expr.X_add_number + + lastpos) > 32) + { + as_bad (_("Improper extract size (%lu, position %lu)"), + (unsigned long) imm_expr.X_add_number, + (unsigned long) lastpos); + imm_expr.X_add_number &= OP_MASK_EXTMSBD; + } + ip->insn_opcode |= (imm_expr.X_add_number + - 1) << OP_SH_EXTMSBD; + imm_expr.X_op = O_absent; + s = expr_end; + continue; + + default: + as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"), + *args, insn->name, insn->args); + /* Further processing is fruitless. */ + return; + } + break; + case '<': /* must be at least one digit */ /* * According to the manual, if the shift amount is greater @@ -8391,6 +8482,7 @@ mips_ip (str, ip) case 'w': /* both dest and target */ case 'E': /* coprocessor target register */ case 'G': /* coprocessor destination register */ + case 'K': /* 'rdhwr' destination register */ case 'x': /* ignore register name */ case 'z': /* must be zero register */ case 'U': /* destination register (clo/clz). */ @@ -8412,7 +8504,7 @@ mips_ip (str, ip) if (regno > 31) as_bad (_("Invalid register number (%d)"), regno); } - else if (*args == 'E' || *args == 'G') + else if (*args == 'E' || *args == 'G' || *args == 'K') goto notreg; else { @@ -8486,7 +8578,8 @@ mips_ip (str, ip) if (regno == AT && ! mips_opts.noat && *args != 'E' - && *args != 'G') + && *args != 'G' + && *args != 'K') as_warn (_("Used $at without \".set noat\"")); c = *args; if (*s == ' ') @@ -8516,6 +8609,7 @@ mips_ip (str, ip) break; case 'd': case 'G': + case 'K': ip->insn_opcode |= regno << OP_SH_RD; break; case 'U': @@ -10377,8 +10471,10 @@ struct option md_longopts[] = #define OPTION_NO_RELAX_BRANCH (OPTION_MD_BASE + 40) {"relax-branch", no_argument, NULL, OPTION_RELAX_BRANCH}, {"no-relax-branch", no_argument, NULL, OPTION_NO_RELAX_BRANCH}, +#define OPTION_MIPS32R2 (OPTION_MD_BASE + 41) + {"mips32r2", no_argument, NULL, OPTION_MIPS32R2}, #ifdef OBJ_ELF -#define OPTION_ELF_BASE (OPTION_MD_BASE + 41) +#define OPTION_ELF_BASE (OPTION_MD_BASE + 42) #define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0) {"KPIC", no_argument, NULL, OPTION_CALL_SHARED}, {"call_shared", no_argument, NULL, OPTION_CALL_SHARED}, @@ -10499,6 +10595,10 @@ md_parse_option (c, arg) file_mips_isa = ISA_MIPS32; break; + case OPTION_MIPS32R2: + file_mips_isa = ISA_MIPS32R2; + break; + case OPTION_MIPS64: file_mips_isa = ISA_MIPS64; break; @@ -12019,27 +12119,49 @@ s_mipsset (x) mips_opts.ase_mdmx = 0; else if (strncmp (name, "mips", 4) == 0) { - int isa; + int reset = 0; /* Permit the user to change the ISA on the fly. Needless to say, misuse can cause serious problems. */ - isa = atoi (name + 4); - switch (isa) + if (strcmp (name, "mips0") == 0) + { + reset = 1; + mips_opts.isa = file_mips_isa; + } + else if (strcmp (name, "mips1") == 0) + mips_opts.isa = ISA_MIPS1; + else if (strcmp (name, "mips2") == 0) + mips_opts.isa = ISA_MIPS2; + else if (strcmp (name, "mips3") == 0) + mips_opts.isa = ISA_MIPS3; + else if (strcmp (name, "mips4") == 0) + mips_opts.isa = ISA_MIPS4; + else if (strcmp (name, "mips5") == 0) + mips_opts.isa = ISA_MIPS5; + else if (strcmp (name, "mips32") == 0) + mips_opts.isa = ISA_MIPS32; + else if (strcmp (name, "mips32r2") == 0) + mips_opts.isa = ISA_MIPS32R2; + else if (strcmp (name, "mips64") == 0) + mips_opts.isa = ISA_MIPS64; + else + as_bad (_("unknown ISA level %s"), name + 4); + + switch (mips_opts.isa) { case 0: - mips_opts.gp32 = file_mips_gp32; - mips_opts.fp32 = file_mips_fp32; break; - case 1: - case 2: - case 32: + case ISA_MIPS1: + case ISA_MIPS2: + case ISA_MIPS32: + case ISA_MIPS32R2: mips_opts.gp32 = 1; mips_opts.fp32 = 1; break; - case 3: - case 4: - case 5: - case 64: + case ISA_MIPS3: + case ISA_MIPS4: + case ISA_MIPS5: + case ISA_MIPS64: mips_opts.gp32 = 0; mips_opts.fp32 = 0; break; @@ -12047,18 +12169,10 @@ s_mipsset (x) as_bad (_("unknown ISA level %s"), name + 4); break; } - - switch (isa) + if (reset) { - case 0: mips_opts.isa = file_mips_isa; break; - case 1: mips_opts.isa = ISA_MIPS1; break; - case 2: mips_opts.isa = ISA_MIPS2; break; - case 3: mips_opts.isa = ISA_MIPS3; break; - case 4: mips_opts.isa = ISA_MIPS4; break; - case 5: mips_opts.isa = ISA_MIPS5; break; - case 32: mips_opts.isa = ISA_MIPS32; break; - case 64: mips_opts.isa = ISA_MIPS64; break; - default: as_bad (_("unknown ISA level %s"), name + 4); break; + mips_opts.gp32 = file_mips_gp32; + mips_opts.fp32 = file_mips_fp32; } } else if (strcmp (name, "autoextend") == 0) @@ -14360,6 +14474,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "mips4", 1, ISA_MIPS4, CPU_R8000 }, { "mips5", 1, ISA_MIPS5, CPU_MIPS5 }, { "mips32", 1, ISA_MIPS32, CPU_MIPS32 }, + { "mips32r2", 1, ISA_MIPS32R2, CPU_MIPS32R2 }, { "mips64", 1, ISA_MIPS64, CPU_MIPS64 }, /* MIPS I */ @@ -14586,6 +14701,7 @@ MIPS options:\n\ -mips4 generate MIPS ISA IV instructions\n\ -mips5 generate MIPS ISA V instructions\n\ -mips32 generate MIPS32 ISA instructions\n\ +-mips32r2 generate MIPS32 release 2 ISA instructions\n\ -mips64 generate MIPS64 ISA instructions\n\ -march=CPU/-mtune=CPU generate code/schedule for CPU, where CPU is one of:\n")); diff --git a/gas/configure b/gas/configure index 85ce557a98e..baf92b3d6c8 100755 --- a/gas/configure +++ b/gas/configure @@ -2677,6 +2677,9 @@ EOF mipsisa32 | mipsisa32el) mips_cpu=mips32 ;; + mipsisa32r2 | mipsisa32r2el) + mips_cpu=mips32r2 + ;; mipsisa64 | mipsisa64el) mips_cpu=mips64 ;; @@ -2686,6 +2689,9 @@ EOF mips64vr | mips64vrel) mips_cpu=vr4100 ;; + mipsisa32r2*) + mips_cpu=`echo $target_cpu | sed -e 's/[a-z]*..r2//' -e 's/el$//'` + ;; mips64* | mipsisa64* | mipsisa32*) mips_cpu=`echo $target_cpu | sed -e 's/[a-z]*..//' -e 's/el$//'` ;; @@ -3174,7 +3180,7 @@ EOF # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3178: checking for $ac_word" >&5 +echo "configure:3184: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3204,7 +3210,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3208: checking for $ac_word" >&5 +echo "configure:3214: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3255,7 +3261,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3259: checking for $ac_word" >&5 +echo "configure:3265: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3287,7 +3293,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:3291: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:3297: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -3298,12 +3304,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 3302 "configure" +#line 3308 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:3307: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3313: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -3329,12 +3335,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:3333: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:3339: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:3338: checking whether we are using GNU C" >&5 +echo "configure:3344: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3343,7 +3349,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3347: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:3353: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -3362,7 +3368,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:3366: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:3372: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3399,7 +3405,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3403: checking for $ac_word" >&5 +echo "configure:3409: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_YACC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3430,7 +3436,7 @@ done test -n "$YACC" || YACC="yacc" echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:3434: checking how to run the C preprocessor" >&5 +echo "configure:3440: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -3445,13 +3451,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext < Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3455: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3461: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3462,13 +3468,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext < Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3472: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3478: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3479,13 +3485,13 @@ else rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext < Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3489: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3495: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -3515,7 +3521,7 @@ do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3519: checking for $ac_word" >&5 +echo "configure:3525: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3548,7 +3554,7 @@ test -n "$LEX" || LEX="$missing_dir/missing flex" # Extract the first word of "flex", so it can be a program name with args. set dummy flex; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3552: checking for $ac_word" >&5 +echo "configure:3558: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LEX'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3582,7 +3588,7 @@ then *) ac_lib=l ;; esac echo $ac_n "checking for yywrap in -l$ac_lib""... $ac_c" 1>&6 -echo "configure:3586: checking for yywrap in -l$ac_lib" >&5 +echo "configure:3592: checking for yywrap in -l$ac_lib" >&5 ac_lib_var=`echo $ac_lib'_'yywrap | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -3590,7 +3596,7 @@ else ac_save_LIBS="$LIBS" LIBS="-l$ac_lib $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3611: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -3624,7 +3630,7 @@ fi fi echo $ac_n "checking lex output file root""... $ac_c" 1>&6 -echo "configure:3628: checking lex output file root" >&5 +echo "configure:3634: checking lex output file root" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_root'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3645,7 +3651,7 @@ echo "$ac_t""$ac_cv_prog_lex_root" 1>&6 LEX_OUTPUT_ROOT=$ac_cv_prog_lex_root echo $ac_n "checking whether yytext is a pointer""... $ac_c" 1>&6 -echo "configure:3649: checking whether yytext is a pointer" >&5 +echo "configure:3655: checking whether yytext is a pointer" >&5 if eval "test \"`echo '$''{'ac_cv_prog_lex_yytext_pointer'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3657,14 +3663,14 @@ echo 'extern char *yytext;' >>$LEX_OUTPUT_ROOT.c ac_save_LIBS="$LIBS" LIBS="$LIBS $LEXLIB" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3674: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_prog_lex_yytext_pointer=yes else @@ -3690,7 +3696,7 @@ ALL_LINGUAS="fr tr es" # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3694: checking for $ac_word" >&5 +echo "configure:3700: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3718,12 +3724,12 @@ else fi echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:3722: checking for ANSI C header files" >&5 +echo "configure:3728: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < #include @@ -3731,7 +3737,7 @@ else #include EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3735: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3741: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3748,7 +3754,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext < EOF @@ -3766,7 +3772,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext < EOF @@ -3787,7 +3793,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext < #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -3798,7 +3804,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:3802: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3808: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -3822,12 +3828,12 @@ EOF fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:3826: checking for working const" >&5 +echo "configure:3832: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3886: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -3897,21 +3903,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:3901: checking for inline" >&5 +echo "configure:3907: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:3921: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -3937,12 +3943,12 @@ EOF esac echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:3941: checking for off_t" >&5 +echo "configure:3947: checking for off_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < #if STDC_HEADERS @@ -3970,12 +3976,12 @@ EOF fi echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:3974: checking for size_t" >&5 +echo "configure:3980: checking for size_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < #if STDC_HEADERS @@ -4005,19 +4011,19 @@ fi # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:4009: checking for working alloca.h" >&5 +echo "configure:4015: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:4021: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4027: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -4038,12 +4044,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:4042: checking for alloca" >&5 +echo "configure:4048: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4081: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -4103,12 +4109,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:4107: checking whether alloca needs Cray hooks" >&5 +echo "configure:4113: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4137: checking for $ac_func" >&5 +echo "configure:4143: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4171: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4188,7 +4194,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:4192: checking stack direction for C alloca" >&5 +echo "configure:4198: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4196,7 +4202,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4225: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -4236,21 +4242,21 @@ EOF fi -for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h +for ac_hdr in unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4244: checking for $ac_hdr" >&5 +echo "configure:4250: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4254: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4260: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4279,12 +4285,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4283: checking for $ac_func" >&5 +echo "configure:4289: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4317: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4332,7 +4338,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:4336: checking for working mmap" >&5 +echo "configure:4342: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4340,7 +4346,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext < #include -#if HAVE_SYS_TYPES_H -# include -#endif - -#if HAVE_STDLIB_H -# include -#endif - -#if HAVE_SYS_STAT_H -# include -#endif - -#if HAVE_UNISTD_H -# include -#endif - /* This mess was copied from the GNU getpagesize.h. */ #ifndef HAVE_GETPAGESIZE +# ifdef HAVE_UNISTD_H +# include +# endif /* Assume that all systems that can run configure have sys/param.h. */ # ifndef HAVE_SYS_PARAM_H @@ -4493,7 +4486,7 @@ main() } EOF -if { (eval echo configure:4497: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:4490: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -4521,17 +4514,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4525: checking for $ac_hdr" >&5 +echo "configure:4518: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4535: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4528: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4561,12 +4554,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4565: checking for $ac_func" >&5 +echo "configure:4558: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4586: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4618,12 +4611,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4622: checking for $ac_func" >&5 +echo "configure:4615: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4643: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4680,19 +4673,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:4684: checking for LC_MESSAGES" >&5 +echo "configure:4677: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:4696: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4689: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -4713,7 +4706,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:4717: checking whether NLS is requested" >&5 +echo "configure:4710: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -4733,7 +4726,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:4737: checking whether included gettext is requested" >&5 +echo "configure:4730: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -4752,17 +4745,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:4756: checking for libintl.h" >&5 +echo "configure:4749: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4766: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4759: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4779,19 +4772,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:4783: checking for gettext in libc" >&5 +echo "configure:4776: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:4795: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4788: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -4807,7 +4800,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:4811: checking for bindtextdomain in -lintl" >&5 +echo "configure:4804: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4815,7 +4808,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4823: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -4842,19 +4835,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:4846: checking for gettext in libintl" >&5 +echo "configure:4839: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4851: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -4882,7 +4875,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4886: checking for $ac_word" >&5 +echo "configure:4879: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4916,12 +4909,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:4920: checking for $ac_func" >&5 +echo "configure:4913: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4941: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4971,7 +4964,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4975: checking for $ac_word" >&5 +echo "configure:4968: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5007,7 +5000,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5011: checking for $ac_word" >&5 +echo "configure:5004: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5039,7 +5032,7 @@ else fi cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5044: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -5079,7 +5072,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5083: checking for $ac_word" >&5 +echo "configure:5076: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5113,7 +5106,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5117: checking for $ac_word" >&5 +echo "configure:5110: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5149,7 +5142,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:5153: checking for $ac_word" >&5 +echo "configure:5146: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5239,7 +5232,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:5243: checking for catalogs to be installed" >&5 +echo "configure:5236: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -5267,17 +5260,17 @@ echo "configure:5243: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:5271: checking for linux/version.h" >&5 +echo "configure:5264: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:5281: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:5274: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5340,7 +5333,7 @@ fi echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:5344: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:5337: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" @@ -5365,7 +5358,7 @@ fi echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:5369: checking for executable suffix" >&5 +echo "configure:5362: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5375,7 +5368,7 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:5379: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:5372: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in *.c | *.o | *.obj) ;; @@ -5400,17 +5393,17 @@ for ac_hdr in string.h stdlib.h memory.h strings.h unistd.h stdarg.h varargs.h e do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:5404: checking for $ac_hdr" >&5 +echo "configure:5397: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:5414: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:5407: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -5440,7 +5433,7 @@ done # Put this here so that autoconf's "cross-compiling" message doesn't confuse # people who are not cross-compiling but are compiling cross-assemblers. echo $ac_n "checking whether compiling a cross-assembler""... $ac_c" 1>&6 -echo "configure:5444: checking whether compiling a cross-assembler" >&5 +echo "configure:5437: checking whether compiling a cross-assembler" >&5 if test "${host}" = "${target}"; then cross_gas=no else @@ -5455,19 +5448,19 @@ echo "$ac_t""$cross_gas" 1>&6 # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:5459: checking for working alloca.h" >&5 +echo "configure:5452: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:5471: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5464: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -5488,12 +5481,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:5492: checking for alloca" >&5 +echo "configure:5485: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5518: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -5553,12 +5546,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:5557: checking whether alloca needs Cray hooks" >&5 +echo "configure:5550: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5587: checking for $ac_func" >&5 +echo "configure:5580: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5608: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5638,7 +5631,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:5642: checking stack direction for C alloca" >&5 +echo "configure:5635: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -5646,7 +5639,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:5662: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -5687,21 +5680,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:5691: checking for inline" >&5 +echo "configure:5684: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:5698: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -5731,12 +5724,12 @@ esac for ac_func in unlink remove do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5735: checking for $ac_func" >&5 +echo "configure:5728: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5756: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5788,12 +5781,12 @@ done for ac_func in sbrk do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:5792: checking for $ac_func" >&5 +echo "configure:5785: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5813: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -5851,7 +5844,7 @@ case $host in ;; *-ncr-sysv4.3*) echo $ac_n "checking for _mwvalidcheckl in -lmw""... $ac_c" 1>&6 -echo "configure:5855: checking for _mwvalidcheckl in -lmw" >&5 +echo "configure:5848: checking for _mwvalidcheckl in -lmw" >&5 ac_lib_var=`echo mw'_'_mwvalidcheckl | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5859,7 +5852,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lmw $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5867: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5891,7 +5884,7 @@ else fi echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:5895: checking for main in -lm" >&5 +echo "configure:5888: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5899,14 +5892,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5903: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5929,7 +5922,7 @@ fi ;; *) echo $ac_n "checking for main in -lm""... $ac_c" 1>&6 -echo "configure:5933: checking for main in -lm" >&5 +echo "configure:5926: checking for main in -lm" >&5 ac_lib_var=`echo m'_'main | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -5937,14 +5930,14 @@ else ac_save_LIBS="$LIBS" LIBS="-lm $LIBS" cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5941: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -5975,12 +5968,12 @@ esac # enough, but on some of those systems, the assert macro relies on requoting # working properly! echo $ac_n "checking for working assert macro""... $ac_c" 1>&6 -echo "configure:5979: checking for working assert macro" >&5 +echo "configure:5972: checking for working assert macro" >&5 if eval "test \"`echo '$''{'gas_cv_assert_ok'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext < #include @@ -5996,7 +5989,7 @@ assert (a == b ; return 0; } EOF -if { (eval echo configure:6000: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:5993: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_assert_ok=yes else @@ -6037,12 +6030,12 @@ gas_test_headers=" " echo $ac_n "checking whether declaration is required for strstr""... $ac_c" 1>&6 -echo "configure:6041: checking whether declaration is required for strstr" >&5 +echo "configure:6034: checking whether declaration is required for strstr" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_strstr'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6050: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_strstr=no else @@ -6074,12 +6067,12 @@ fi echo $ac_n "checking whether declaration is required for malloc""... $ac_c" 1>&6 -echo "configure:6078: checking whether declaration is required for malloc" >&5 +echo "configure:6071: checking whether declaration is required for malloc" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_malloc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6087: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_malloc=no else @@ -6111,12 +6104,12 @@ fi echo $ac_n "checking whether declaration is required for free""... $ac_c" 1>&6 -echo "configure:6115: checking whether declaration is required for free" >&5 +echo "configure:6108: checking whether declaration is required for free" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_free'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6124: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_free=no else @@ -6148,12 +6141,12 @@ fi echo $ac_n "checking whether declaration is required for sbrk""... $ac_c" 1>&6 -echo "configure:6152: checking whether declaration is required for sbrk" >&5 +echo "configure:6145: checking whether declaration is required for sbrk" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_sbrk'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6161: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_sbrk=no else @@ -6185,12 +6178,12 @@ fi echo $ac_n "checking whether declaration is required for environ""... $ac_c" 1>&6 -echo "configure:6189: checking whether declaration is required for environ" >&5 +echo "configure:6182: checking whether declaration is required for environ" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_environ'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6198: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_environ=no else @@ -6225,12 +6218,12 @@ fi # for it? echo $ac_n "checking whether declaration is required for errno""... $ac_c" 1>&6 -echo "configure:6229: checking whether declaration is required for errno" >&5 +echo "configure:6222: checking whether declaration is required for errno" >&5 if eval "test \"`echo '$''{'gas_cv_decl_needed_errno'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:6242: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gas_cv_decl_needed_errno=no else diff --git a/gas/configure.in b/gas/configure.in index ebffca6b9d8..0917fb83f79 100644 --- a/gas/configure.in +++ b/gas/configure.in @@ -519,6 +519,9 @@ changequote([,])dnl mipsisa32 | mipsisa32el) mips_cpu=mips32 ;; + mipsisa32r2 | mipsisa32r2el) + mips_cpu=mips32r2 + ;; mipsisa64 | mipsisa64el) mips_cpu=mips64 ;; @@ -528,6 +531,11 @@ changequote([,])dnl mips64vr | mips64vrel) mips_cpu=vr4100 ;; + mipsisa32r2*) +changequote(,)dnl + mips_cpu=`echo $target_cpu | sed -e 's/[a-z]*..r2//' -e 's/el$//'` +changequote([,])dnl + ;; mips64* | mipsisa64* | mipsisa32*) changequote(,)dnl mips_cpu=`echo $target_cpu | sed -e 's/[a-z]*..//' -e 's/el$//'` diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index e654c240d0b..e82652328f0 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -383,7 +383,8 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. [@b{-non_shared}] [@b{-xgot}] [@b{--membedded-pic}] [@b{-mabi}=@var{ABI}] [@b{-32}] [@b{-n32}] [@b{-64}] [@b{-mfp32}] [@b{-mgp32}] [@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}] - [@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips64}] + [@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}] + [@b{-mips64}] [@b{-construct-floats}] [@b{-no-construct-floats}] [@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}] [@b{-mfix7000}] [@b{-mno-fix7000}] @@ -909,13 +910,16 @@ Generate ``little endian'' format output. @itemx -mips4 @itemx -mips5 @itemx -mips32 +@itemx -mips32r2 @itemx -mips64 Generate code for a particular @sc{mips} Instruction Set Architecture level. @samp{-mips1} is an alias for @samp{-march=r3000}, @samp{-mips2} is an alias for @samp{-march=r6000}, @samp{-mips3} is an alias for @samp{-march=r4000} and @samp{-mips4} is an alias for @samp{-march=r8000}. -@samp{-mips5}, @samp{-mips32}, and @samp{-mips64} correspond to generic -@samp{MIPS V}, @samp{MIPS32}, and @samp{MIPS64} ISA processors, +@samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and @samp{-mips64} +correspond to generic +@samp{MIPS V}, @samp{MIPS32}, @samp{MIPS32 Release 2}, and +@samp{MIPS64} ISA processors, respectively. @item -march=@var{CPU} diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index 6b82fd0c957..621efe83397 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -65,13 +65,15 @@ to select big-endian output, and @samp{-EL} for little-endian. @itemx -mips4 @itemx -mips5 @itemx -mips32 +@itemx -mips32r2 @itemx -mips64 Generate code for a particular MIPS Instruction Set Architecture level. @samp{-mips1} corresponds to the @sc{r2000} and @sc{r3000} processors, @samp{-mips2} to the @sc{r6000} processor, @samp{-mips3} to the @sc{r4000} processor, and @samp{-mips4} to the @sc{r8000} and -@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, and -@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, and +@sc{r10000} processors. @samp{-mips5}, @samp{-mips32}, @samp{-mips32r2}, and +@samp{-mips64} correspond to generic @sc{MIPS V}, @sc{MIPS32}, +@sc{MIPS32 Release 2}, and @sc{MIPS64} ISA processors, respectively. You can also switch instruction sets during the assembly; see @ref{MIPS ISA, Directives to override the ISA level}. diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index b4c687c6311..93bb537bd2c 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2002-12-29 Chris Demetriou + + * gas/mips/cp0-names-mips32r2.d: New test. + * gas/mips/hwr-names-mips32r2.d: New test. + * gas/mips/hwr-names-numeric.d: New test. + * gas/mips/hwr-names.s: New test source file. + * gas/mips/mips32r2.d: New test. + * gas/mips/mips32r2.s: New test source file. + * gas/mips/mips32r2-ill.l: New test. + * gas/mips/mips32r2-ill.s: New test source file. + * gas/mips/mips.exp: Add mips32r2 architecture data array + entry. Run new tests mentioned above. + 2002-12-24 Dmitry Diky * gas/msp430: New directory. diff --git a/gas/testsuite/gas/mips/cp0-names-mips32r2.d b/gas/testsuite/gas/mips/cp0-names-mips32r2.d new file mode 100644 index 00000000000..edd67d9e6a0 --- /dev/null +++ b/gas/testsuite/gas/mips/cp0-names-mips32r2.d @@ -0,0 +1,42 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=mips32r2 +#name: MIPS CP0 register disassembly (mips32r2) +#source: cp0-names.s + +# Check objdump's handling of -M cp0-names=foo options. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 40800000 mtc0 \$0,c0_index +0+0004 <[^>]*> 40800800 mtc0 \$0,c0_random +0+0008 <[^>]*> 40801000 mtc0 \$0,c0_entrylo0 +0+000c <[^>]*> 40801800 mtc0 \$0,c0_entrylo1 +0+0010 <[^>]*> 40802000 mtc0 \$0,c0_context +0+0014 <[^>]*> 40802800 mtc0 \$0,c0_pagemask +0+0018 <[^>]*> 40803000 mtc0 \$0,c0_wired +0+001c <[^>]*> 40803800 mtc0 \$0,c0_hwrena +0+0020 <[^>]*> 40804000 mtc0 \$0,c0_badvaddr +0+0024 <[^>]*> 40804800 mtc0 \$0,c0_count +0+0028 <[^>]*> 40805000 mtc0 \$0,c0_entryhi +0+002c <[^>]*> 40805800 mtc0 \$0,c0_compare +0+0030 <[^>]*> 40806000 mtc0 \$0,c0_status +0+0034 <[^>]*> 40806800 mtc0 \$0,c0_cause +0+0038 <[^>]*> 40807000 mtc0 \$0,c0_epc +0+003c <[^>]*> 40807800 mtc0 \$0,c0_prid +0+0040 <[^>]*> 40808000 mtc0 \$0,c0_config +0+0044 <[^>]*> 40808800 mtc0 \$0,c0_lladdr +0+0048 <[^>]*> 40809000 mtc0 \$0,c0_watchlo +0+004c <[^>]*> 40809800 mtc0 \$0,c0_watchhi +0+0050 <[^>]*> 4080a000 mtc0 \$0,c0_xcontext +0+0054 <[^>]*> 4080a800 mtc0 \$0,\$21 +0+0058 <[^>]*> 4080b000 mtc0 \$0,\$22 +0+005c <[^>]*> 4080b800 mtc0 \$0,c0_debug +0+0060 <[^>]*> 4080c000 mtc0 \$0,c0_depc +0+0064 <[^>]*> 4080c800 mtc0 \$0,c0_perfcnt +0+0068 <[^>]*> 4080d000 mtc0 \$0,c0_errctl +0+006c <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr +0+0070 <[^>]*> 4080e000 mtc0 \$0,c0_taglo +0+0074 <[^>]*> 4080e800 mtc0 \$0,c0_taghi +0+0078 <[^>]*> 4080f000 mtc0 \$0,c0_errorepc +0+007c <[^>]*> 4080f800 mtc0 \$0,c0_desave + \.\.\. diff --git a/gas/testsuite/gas/mips/hwr-names-mips32r2.d b/gas/testsuite/gas/mips/hwr-names-mips32r2.d new file mode 100644 index 00000000000..93333e3e565 --- /dev/null +++ b/gas/testsuite/gas/mips/hwr-names-mips32r2.d @@ -0,0 +1,43 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32r2 -M gpr-names=numeric,hwr-names=mips32r2 +#name: MIPS HWR disassembly (mips32r2) +#as: -mips32r2 +#source: hwr-names.s + +# Check objdump's handling of -M hwr-names=foo options. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 7c00003b rdhwr \$0,hwr_cpunum +0+0004 <[^>]*> 7c00083b rdhwr \$0,hwr_synci_step +0+0008 <[^>]*> 7c00103b rdhwr \$0,hwr_cc +0+000c <[^>]*> 7c00183b rdhwr \$0,hwr_ccres +0+0010 <[^>]*> 7c00203b rdhwr \$0,\$4 +0+0014 <[^>]*> 7c00283b rdhwr \$0,\$5 +0+0018 <[^>]*> 7c00303b rdhwr \$0,\$6 +0+001c <[^>]*> 7c00383b rdhwr \$0,\$7 +0+0020 <[^>]*> 7c00403b rdhwr \$0,\$8 +0+0024 <[^>]*> 7c00483b rdhwr \$0,\$9 +0+0028 <[^>]*> 7c00503b rdhwr \$0,\$10 +0+002c <[^>]*> 7c00583b rdhwr \$0,\$11 +0+0030 <[^>]*> 7c00603b rdhwr \$0,\$12 +0+0034 <[^>]*> 7c00683b rdhwr \$0,\$13 +0+0038 <[^>]*> 7c00703b rdhwr \$0,\$14 +0+003c <[^>]*> 7c00783b rdhwr \$0,\$15 +0+0040 <[^>]*> 7c00803b rdhwr \$0,\$16 +0+0044 <[^>]*> 7c00883b rdhwr \$0,\$17 +0+0048 <[^>]*> 7c00903b rdhwr \$0,\$18 +0+004c <[^>]*> 7c00983b rdhwr \$0,\$19 +0+0050 <[^>]*> 7c00a03b rdhwr \$0,\$20 +0+0054 <[^>]*> 7c00a83b rdhwr \$0,\$21 +0+0058 <[^>]*> 7c00b03b rdhwr \$0,\$22 +0+005c <[^>]*> 7c00b83b rdhwr \$0,\$23 +0+0060 <[^>]*> 7c00c03b rdhwr \$0,\$24 +0+0064 <[^>]*> 7c00c83b rdhwr \$0,\$25 +0+0068 <[^>]*> 7c00d03b rdhwr \$0,\$26 +0+006c <[^>]*> 7c00d83b rdhwr \$0,\$27 +0+0070 <[^>]*> 7c00e03b rdhwr \$0,\$28 +0+0074 <[^>]*> 7c00e83b rdhwr \$0,\$29 +0+0078 <[^>]*> 7c00f03b rdhwr \$0,\$30 +0+007c <[^>]*> 7c00f83b rdhwr \$0,\$31 + \.\.\. diff --git a/gas/testsuite/gas/mips/hwr-names-numeric.d b/gas/testsuite/gas/mips/hwr-names-numeric.d new file mode 100644 index 00000000000..71a9700985b --- /dev/null +++ b/gas/testsuite/gas/mips/hwr-names-numeric.d @@ -0,0 +1,43 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32r2 -M gpr-names=numeric,hwr-names=numeric +#name: MIPS HWR disassembly (numeric) +#as: -mips32r2 +#source: hwr-names.s + +# Check objdump's handling of -M hwr-names=foo options. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 7c00003b rdhwr \$0,\$0 +0+0004 <[^>]*> 7c00083b rdhwr \$0,\$1 +0+0008 <[^>]*> 7c00103b rdhwr \$0,\$2 +0+000c <[^>]*> 7c00183b rdhwr \$0,\$3 +0+0010 <[^>]*> 7c00203b rdhwr \$0,\$4 +0+0014 <[^>]*> 7c00283b rdhwr \$0,\$5 +0+0018 <[^>]*> 7c00303b rdhwr \$0,\$6 +0+001c <[^>]*> 7c00383b rdhwr \$0,\$7 +0+0020 <[^>]*> 7c00403b rdhwr \$0,\$8 +0+0024 <[^>]*> 7c00483b rdhwr \$0,\$9 +0+0028 <[^>]*> 7c00503b rdhwr \$0,\$10 +0+002c <[^>]*> 7c00583b rdhwr \$0,\$11 +0+0030 <[^>]*> 7c00603b rdhwr \$0,\$12 +0+0034 <[^>]*> 7c00683b rdhwr \$0,\$13 +0+0038 <[^>]*> 7c00703b rdhwr \$0,\$14 +0+003c <[^>]*> 7c00783b rdhwr \$0,\$15 +0+0040 <[^>]*> 7c00803b rdhwr \$0,\$16 +0+0044 <[^>]*> 7c00883b rdhwr \$0,\$17 +0+0048 <[^>]*> 7c00903b rdhwr \$0,\$18 +0+004c <[^>]*> 7c00983b rdhwr \$0,\$19 +0+0050 <[^>]*> 7c00a03b rdhwr \$0,\$20 +0+0054 <[^>]*> 7c00a83b rdhwr \$0,\$21 +0+0058 <[^>]*> 7c00b03b rdhwr \$0,\$22 +0+005c <[^>]*> 7c00b83b rdhwr \$0,\$23 +0+0060 <[^>]*> 7c00c03b rdhwr \$0,\$24 +0+0064 <[^>]*> 7c00c83b rdhwr \$0,\$25 +0+0068 <[^>]*> 7c00d03b rdhwr \$0,\$26 +0+006c <[^>]*> 7c00d83b rdhwr \$0,\$27 +0+0070 <[^>]*> 7c00e03b rdhwr \$0,\$28 +0+0074 <[^>]*> 7c00e83b rdhwr \$0,\$29 +0+0078 <[^>]*> 7c00f03b rdhwr \$0,\$30 +0+007c <[^>]*> 7c00f83b rdhwr \$0,\$31 + \.\.\. diff --git a/gas/testsuite/gas/mips/hwr-names.s b/gas/testsuite/gas/mips/hwr-names.s new file mode 100644 index 00000000000..f0e056b78fd --- /dev/null +++ b/gas/testsuite/gas/mips/hwr-names.s @@ -0,0 +1,44 @@ +# source file to test objdump's disassembly using various styles of +# HWR (hardware register) names. + + .set noreorder + .set noat + + .globl text_label .text +text_label: + + rdhwr $0, $0 + rdhwr $0, $1 + rdhwr $0, $2 + rdhwr $0, $3 + rdhwr $0, $4 + rdhwr $0, $5 + rdhwr $0, $6 + rdhwr $0, $7 + rdhwr $0, $8 + rdhwr $0, $9 + rdhwr $0, $10 + rdhwr $0, $11 + rdhwr $0, $12 + rdhwr $0, $13 + rdhwr $0, $14 + rdhwr $0, $15 + rdhwr $0, $16 + rdhwr $0, $17 + rdhwr $0, $18 + rdhwr $0, $19 + rdhwr $0, $20 + rdhwr $0, $21 + rdhwr $0, $22 + rdhwr $0, $23 + rdhwr $0, $24 + rdhwr $0, $25 + rdhwr $0, $26 + rdhwr $0, $27 + rdhwr $0, $28 + rdhwr $0, $29 + rdhwr $0, $30 + rdhwr $0, $31 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 29951eb7fa6..d6ebe4e24eb 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -343,6 +343,10 @@ mips_arch_create mips5 64 mips4 {} \ mips_arch_create mips32 32 mips2 {} \ { -march=mips32 -mtune=mips32 } { -mmips:isa32 } \ { mipsisa32-*-* mipsisa32el-*-* } +mips_arch_create mips32r2 32 mips32 { ror } \ + { -march=mips32r2 -mtune=mips32r2 } \ + { -mmips:isa32r2 } \ + { mipsisa32r2-*-* mipsisa32r2el-*-* } mips_arch_create mips64 64 mips5 { mips32 } \ { -march=mips64 -mtune=mips64 } { -mmips:isa64 } \ { mipsisa64-*-* mipsisa64el-*-* } @@ -522,6 +526,9 @@ if { [istarget mips*-*-*] } then { run_dump_test_arches "mips32" [mips_arch_list_matching mips32] + run_dump_test_arches "mips32r2" [mips_arch_list_matching mips32r2] + run_list_test_arches "mips32r2-ill" "" [mips_arch_list_matching mips32r2] + run_dump_test_arches "mips64" [mips_arch_list_matching mips64] run_dump_test "mips64-mips3d" @@ -610,6 +617,10 @@ if { [istarget mips*-*-*] } then { run_dump_test "cp0-names-numeric" run_dump_test "cp0-names-mips32" + run_dump_test "cp0-names-mips32r2" run_dump_test "cp0-names-mips64" run_dump_test "cp0-names-sb1" + + run_dump_test "hwr-names-numeric" + run_dump_test "hwr-names-mips32r2" } diff --git a/gas/testsuite/gas/mips/mips32r2-ill.l b/gas/testsuite/gas/mips/mips32r2-ill.l new file mode 100644 index 00000000000..66223a2323a --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2-ill.l @@ -0,0 +1,15 @@ +.*: Assembler messages: +.*:12: Error: Improper position \([0-9]*\) +.*:15: Error: Improper position \(32\) +.*:18: Error: Improper extract size \(0, position 0\) +.*:21: Error: Improper extract size \(33, position 0\) +.*:24: Error: Improper extract size \(0, position 0\) +.*:27: Error: Improper extract size \(2, position 31\) +.*:30: Error: Improper position \([0-9]*\) +.*:33: Error: Improper position \(32\) +.*:36: Error: Improper insert size \(0, position 0\) +.*:39: Error: Improper insert size \(33, position 0\) +.*:42: Error: Improper insert size \(0, position 0\) +.*:45: Error: Improper insert size \(2, position 31\) +.*:54: Warning: Float register should be even, was 1 +.*:57: Warning: Float register should be even, was 1 diff --git a/gas/testsuite/gas/mips/mips32r2-ill.s b/gas/testsuite/gas/mips/mips32r2-ill.s new file mode 100644 index 00000000000..d350cc9e089 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2-ill.s @@ -0,0 +1,60 @@ +# source file to test illegal mips32r2 instructions + + .set noreorder + .set noat + + .text +text_label: + + # insert and extract position/size checks: + + # ext constraint: 0 <= pos < 32 + ext $4, $5, -1, 1 # error + ext $4, $5, 0, 1 + ext $4, $5, 31, 1 + ext $4, $5, 32, 1 # error + + # ext constraint: 0 < size <= 32 + ext $4, $5, 0, 0 # error + ext $4, $5, 0, 1 + ext $4, $5, 0, 32 + ext $4, $5, 0, 33 # error + + # ext constraint: 0 < (pos+size) <= 32 + ext $4, $5, 0, 0 # error + ext $4, $5, 0, 1 + ext $4, $5, 31, 1 + ext $4, $5, 31, 2 # error + + # ins constraint: 0 <= pos < 32 + ins $4, $5, -1, 1 # error + ins $4, $5, 0, 1 + ins $4, $5, 31, 1 + ins $4, $5, 32, 1 # error + + # ins constraint: 0 < size <= 32 + ins $4, $5, 0, 0 # error + ins $4, $5, 0, 1 + ins $4, $5, 0, 32 + ins $4, $5, 0, 33 # error + + # ins constraint: 0 < (pos+size) <= 32 + ins $4, $5, 0, 0 # error + ins $4, $5, 0, 1 + ins $4, $5, 31, 1 + ins $4, $5, 31, 2 # error + + # FP register checks. + # + # Even registers are supported w/ 32-bit FPU, odd + # registers supported only for 64-bit FPU. + # This file tests 32-bit FPU. + + mfhc1 $17, $f0 + mfhc1 $17, $f1 # warn + + mthc1 $17, $f0 + mthc1 $17, $f1 # warn + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/gas/testsuite/gas/mips/mips32r2.d b/gas/testsuite/gas/mips/mips32r2.d new file mode 100644 index 00000000000..196cb41eb5f --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2.d @@ -0,0 +1,46 @@ +#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric +#name: MIPS MIPS32r2 instructions + +# Check MIPS32 instruction assembly + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> 000000c0 ehb +0+0004 <[^>]*> 7ca43980 ext \$4,\$5,0x6,0x8 +0+0008 <[^>]*> 7ca46984 ins \$4,\$5,0x6,0x8 +0+000c <[^>]*> 0100fc09 jalr.hb \$8 +0+0010 <[^>]*> 0120a409 jalr.hb \$20,\$9 +0+0014 <[^>]*> 01000408 jr.hb \$8 +0+0018 <[^>]*> 7c0a003b rdhwr \$10,\$0 +0+001c <[^>]*> 7c0b083b rdhwr \$11,\$1 +0+0020 <[^>]*> 7c0c103b rdhwr \$12,\$2 +0+0024 <[^>]*> 7c0d183b rdhwr \$13,\$3 +0+0028 <[^>]*> 7c0e203b rdhwr \$14,\$4 +0+002c <[^>]*> 7c0f283b rdhwr \$15,\$5 +0+0030 <[^>]*> 002acf02 ror \$25,\$10,0x1c +0+0034 <[^>]*> 002ac902 ror \$25,\$10,0x4 +0+0038 <[^>]*> 0004c823 negu \$25,\$4 +0+003c <[^>]*> 032ac846 rorv \$25,\$10,\$25 +0+0040 <[^>]*> 008ac846 rorv \$25,\$10,\$4 +0+0044 <[^>]*> 008ac846 rorv \$25,\$10,\$4 +0+0048 <[^>]*> 7c073c20 seb \$7,\$7 +0+004c <[^>]*> 7c0a4420 seb \$8,\$10 +0+0050 <[^>]*> 7c073e20 seh \$7,\$7 +0+0054 <[^>]*> 7c0a4620 seh \$8,\$10 +0+0058 <[^>]*> 055f5555 synci 21845\(\$10\) +0+005c <[^>]*> 7c0738a0 wsbh \$7,\$7 +0+0060 <[^>]*> 7c0a40a0 wsbh \$8,\$10 +0+0064 <[^>]*> 41606000 di +0+0068 <[^>]*> 41606000 di +0+006c <[^>]*> 416a6000 di \$10 +0+0070 <[^>]*> 41606020 ei +0+0074 <[^>]*> 41606020 ei +0+0078 <[^>]*> 416a6020 ei \$10 +0+007c <[^>]*> 41595000 rdpgpr \$10,\$25 +0+0080 <[^>]*> 41d95000 wrpgpr \$10,\$25 +0+0084 <[^>]*> 44710000 mfhc1 \$17,\$f0 +0+0088 <[^>]*> 44f10000 mthc1 \$17,\$f0 +0+008c <[^>]*> 48715555 mfhc2 \$17,0x5555 +0+0090 <[^>]*> 48f15555 mthc2 \$17,0x5555 + ... diff --git a/gas/testsuite/gas/mips/mips32r2.s b/gas/testsuite/gas/mips/mips32r2.s new file mode 100644 index 00000000000..4731fc41861 --- /dev/null +++ b/gas/testsuite/gas/mips/mips32r2.s @@ -0,0 +1,81 @@ +# source file to test assembly of mips32r2 instructions + + .set noreorder + .set noat + + .text +text_label: + + # unprivileged CPU instructions + + ehb + + ext $4, $5, 6, 8 + + ins $4, $5, 6, 8 + + jalr.hb $8 + jalr.hb $20, $9 + + jr.hb $8 + + # Note, further testing of rdhwr is done in hwr-names-mips32r2.d + rdhwr $10, $0 + rdhwr $11, $1 + rdhwr $12, $2 + rdhwr $13, $3 + rdhwr $14, $4 + rdhwr $15, $5 + + # This file checks that in fact HW rotate will + # be used for this arch, and checks assembly + # of the official MIPS mnemonics. (Note that disassembly + # uses the traditional "ror" and "rorv" mnemonics.) + # Additional rotate tests are done by rol-hw.d. + rotl $25, $10, 4 + rotr $25, $10, 4 + rotl $25, $10, $4 + rotr $25, $10, $4 + rotrv $25, $10, $4 + + seb $7 + seb $8, $10 + + seh $7 + seh $8, $10 + + synci 0x5555($10) + + wsbh $7 + wsbh $8, $10 + + # cp0 instructions + + di + di $0 + di $10 + + ei + ei $0 + ei $10 + + rdpgpr $10, $25 + + wrpgpr $10, $25 + + # FPU (cp1) instructions + # + # Even registers are supported w/ 32-bit FPU, odd + # registers supported only for 64-bit FPU. + # Only the 32-bit FPU instructions are tested here. + + mfhc1 $17, $f0 + mthc1 $17, $f0 + + # cp2 instructions + + mfhc2 $17, 0x5555 + mthc2 $17, 0x5555 + +# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... + .space 8 diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index 87e8a3bac1f..c16c927f7cd 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,7 @@ +2002-12-30 Chris Demetriou + + * mips.h (E_MIPS_ARCH_32R2): New define. + 2002-12-24 Dmitry Diky * common.h: Define msp430 machine numbers. diff --git a/include/elf/mips.h b/include/elf/mips.h index 81451ab55cd..964c59a12e9 100644 --- a/include/elf/mips.h +++ b/include/elf/mips.h @@ -145,6 +145,9 @@ END_RELOC_NUMBERS (R_MIPS_maxext) /* -mips64 code. */ #define E_MIPS_ARCH_64 0x60000000 +/* -mips32r2 code. */ +#define E_MIPS_ARCH_32R2 0x70000000 + /* The ABI of the file. Also see EF_MIPS_ABI2 above. */ #define EF_MIPS_ABI 0x0000F000 diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 10fbb98f040..6f68432fc35 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,11 @@ +2002-12-30 Chris Demetriou + + * mips.h: Document "+" as the start of two-character operand + type names, and add new "K", "+A", "+B", and "+C" operand types. + (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) + (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New + defines. + 2002-12-24 Dmitry Diky * msp430.h: New file. Defines msp430 opcodes. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index f5f648bd34d..ce6ce0812cf 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -142,6 +142,10 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #define OP_SH_VECBYTE 22 #define OP_MASK_VECALIGN 0x7 /* Vector byte-align (alni.ob) op. */ #define OP_SH_VECALIGN 21 +#define OP_MASK_INSMSB 0x1f /* "ins" MSB. */ +#define OP_SH_INSMSB 11 +#define OP_MASK_EXTMSBD 0x1f /* "ext" MSBD. */ +#define OP_SH_EXTMSBD 11 #define OP_OP_COP0 0x10 #define OP_OP_COP1 0x11 @@ -228,6 +232,12 @@ struct mips_opcode "J" 19 bit wait function code (OP_*_CODE19) "x" accept and ignore register name "z" must be zero register + "K" 5 bit Hardware Register (rdhwr instruction) (OP_*_RD) + "+A" 5 bit ins/ext position/lsb (OP_*_SHAMT) + "+B" 5 bit "ins" size spec (OP_*_INSMSB). Requires that "+A" + occur first! + "+C" 5 bit "ext" msbd spec (OP_*_EXTMSBD). Requires that "+A" + occur first! Floating point instructions: "D" 5 bit destination register (OP_*_FD) @@ -268,11 +278,16 @@ struct mips_opcode "()" parens surrounding optional value "," separates operands "[]" brackets around index for vector-op scalar operand specifier (vr5400) + "+" Start of extension sequence. Characters used so far, for quick reference when adding more: - "%[]<>()," - "ABCDEFGHIJLMNOPQRSTUVWXYZ" + "%[]<>(),+" + "ABCDEFGHIJKLMNOPQRSTUVWXYZ" "abcdefhijklopqrstuvwxz" + + Extension character sequences used so far ("+" followed by the + following), for quick reference when adding more: + "ABC" */ /* These are the bits which may be set in the pinfo field of an @@ -364,6 +379,7 @@ struct mips_opcode #define INSN_ISA5 0x00000100 #define INSN_ISA32 0x00000200 #define INSN_ISA64 0x00000400 +#define INSN_ISA32R2 0x00000800 /* Masks used for MIPS-defined ASEs. */ #define INSN_ASE_MASK 0x0000f000 @@ -406,9 +422,12 @@ struct mips_opcode #define ISA_MIPS3 (ISA_MIPS2 | INSN_ISA3) #define ISA_MIPS4 (ISA_MIPS3 | INSN_ISA4) #define ISA_MIPS5 (ISA_MIPS4 | INSN_ISA5) + #define ISA_MIPS32 (ISA_MIPS2 | INSN_ISA32) #define ISA_MIPS64 (ISA_MIPS5 | INSN_ISA32 | INSN_ISA64) +#define ISA_MIPS32R2 (ISA_MIPS32 | INSN_ISA32R2) + /* CPU defines, use instead of hardcoding processor number. Keep this in sync with bfd/archures.c in order for machine selection to work. */ #define CPU_UNKNOWN 0 /* Gas internal use. */ @@ -432,6 +451,7 @@ struct mips_opcode #define CPU_R12000 12000 #define CPU_MIPS16 16 #define CPU_MIPS32 32 +#define CPU_MIPS32R2 33 #define CPU_MIPS5 5 #define CPU_MIPS64 64 #define CPU_SB1 12310201 /* octal 'SB', 01. */ diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7ff7f953639..98a4b3c70af 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,31 @@ +2002-12-30 Chris Demetriou + + * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) + (mips_hwr_names_mips3264r2): New arrays. + (mips_arch_choice): New "hwr_names" member. + (mips_arch_choices): Adjust for structure change, and add a new + entry for "mips32r2" ISA. + (mips_hwr_names): New variable. + (set_default_mips_dis_options): Set mips_hwr_names. + (parse_mips_dis_option): New "hwr-names" option which sets + mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. + (print_insn_arg): Change return type to "int" + and use that to indicate number of characters consumed. + Add support for "+" operand extension character, "+A", "+B", + "+C", and "K" operands. + (print_insn_mips): Adjust for changes to print_insn_arg. + (print_mips_disassembler_options): Adjust for "hwr-names" + addition and "reg-names" change. + * mips-opc (I33): New define (shorthand for INSN_ISA32R2). + (mips_builtin_opcodes): Note that "nop" and "ssnop" are special + forms of "sll". Add new MIPS32 Release 2 instructions: ehb, + di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, + rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. + Note that hardware rotate instructions (ror, rorv) can be + used on MIPS32 Release 2, and add the official mnemonics + for them (rotr, rotrv) and the similar "rotl" mnemonic for + left-rotate. + 2002-12-30 Dmitry Diky * configure.in: Add msp430 target. diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 1528aadc5f1..71cf6beacb2 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -50,7 +50,7 @@ static int _print_insn_mips PARAMS ((bfd_vma, struct disassemble_info *, enum bfd_endian)); static int print_insn_mips PARAMS ((bfd_vma, unsigned long int, struct disassemble_info *)); -static void print_insn_arg +static int print_insn_arg PARAMS ((const char *, unsigned long, bfd_vma, struct disassemble_info *)); static int print_insn_mips16 PARAMS ((bfd_vma, struct disassemble_info *)); @@ -134,6 +134,17 @@ static const char * const mips_cp0_names_mips3264[32] = { "c0_taglo", "c0_taghi", "c0_errorepc", "c0_desave", }; +static const char * const mips_cp0_names_mips3264r2[32] = { + "c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1", + "c0_context", "c0_pagemask", "c0_wired", "c0_hwrena", + "c0_badvaddr", "c0_count", "c0_entryhi", "c0_compare", + "c0_status", "c0_cause", "c0_epc", "c0_prid", + "c0_config", "c0_lladdr", "c0_watchlo", "c0_watchhi", + "c0_xcontext", "$21", "$22", "c0_debug", + "c0_depc", "c0_perfcnt", "c0_errctl", "c0_cacheerr", + "c0_taglo", "c0_taghi", "c0_errorepc", "c0_desave", +}; + /* SB-1: MIPS64 (mips_cp0_names_mips3264) with minor mods. */ static const char * const mips_cp0_names_sb1[32] = { "c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1", @@ -146,6 +157,21 @@ static const char * const mips_cp0_names_sb1[32] = { "c0_taglo_i", "c0_taghi_i", "c0_errorepc", "c0_desave", }; +static const char * const mips_hwr_names_numeric[32] = { + "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", + "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", + "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", + "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31" +}; + +static const char * const mips_hwr_names_mips3264r2[32] = { + "hwr_cpunum", "hwr_synci_step", "hwr_cc", "hwr_ccres", + "$4", "$5", "$6", "$7", + "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", + "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", + "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31" +}; + struct mips_abi_choice { const char *name; const char * const *gpr_names; @@ -166,49 +192,50 @@ struct mips_arch_choice { int processor; int isa; const char * const *cp0_names; + const char * const *hwr_names; }; struct mips_arch_choice mips_arch_choices[] = { { "numeric", 0, 0, 0, 0, - mips_cp0_names_numeric }, + mips_cp0_names_numeric, mips_hwr_names_numeric }, { "r3000", 1, bfd_mach_mips3000, CPU_R3000, ISA_MIPS1, - NULL }, + NULL, NULL }, { "r3900", 1, bfd_mach_mips3900, CPU_R3900, ISA_MIPS1, - NULL }, + NULL, NULL }, { "r4000", 1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3, - NULL }, + NULL, NULL }, { "r4010", 1, bfd_mach_mips4010, CPU_R4010, ISA_MIPS2, - NULL }, + NULL, NULL }, { "vr4100", 1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3, - NULL }, + NULL, NULL }, { "vr4111", 1, bfd_mach_mips4111, CPU_R4111, ISA_MIPS3, - NULL }, + NULL, NULL }, { "vr4120", 1, bfd_mach_mips4120, CPU_VR4120, ISA_MIPS3, - NULL }, + NULL, NULL }, { "r4300", 1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3, - NULL }, + NULL, NULL }, { "r4400", 1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3, - NULL }, + NULL, NULL }, { "r4600", 1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3, - NULL }, + NULL, NULL }, { "r4650", 1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3, - NULL }, + NULL, NULL }, { "r5000", 1, bfd_mach_mips5000, CPU_R5000, ISA_MIPS4, - NULL }, + NULL, NULL }, { "vr5400", 1, bfd_mach_mips5400, CPU_VR5400, ISA_MIPS4, - NULL }, + NULL, NULL }, { "vr5500", 1, bfd_mach_mips5500, CPU_VR5500, ISA_MIPS4, - NULL }, + NULL, NULL }, { "r6000", 1, bfd_mach_mips6000, CPU_R6000, ISA_MIPS2, - NULL }, + NULL, NULL }, { "r8000", 1, bfd_mach_mips8000, CPU_R8000, ISA_MIPS4, - NULL }, + NULL, NULL }, { "r10000", 1, bfd_mach_mips10000, CPU_R10000, ISA_MIPS4, - NULL }, + NULL, NULL }, { "r12000", 1, bfd_mach_mips12000, CPU_R12000, ISA_MIPS4, - NULL }, + NULL, NULL }, { "mips5", 1, bfd_mach_mips5, CPU_MIPS5, ISA_MIPS5, - NULL }, + NULL, NULL }, /* For stock MIPS32, disassemble all applicable MIPS-specified ASEs. Note that MIPS-3D and MDMX are not applicable to MIPS32. (See _MIPS32 Architecture For Programmers Volume I: Introduction to the @@ -216,19 +243,22 @@ struct mips_arch_choice mips_arch_choices[] = { page 1. */ { "mips32", 1, bfd_mach_mipsisa32, CPU_MIPS32, ISA_MIPS32 | INSN_MIPS16, - mips_cp0_names_mips3264 }, + mips_cp0_names_mips3264, NULL }, + { "mips32r2", 1, bfd_mach_mipsisa32r2, CPU_MIPS32R2, + ISA_MIPS32R2 | INSN_MIPS16, + mips_cp0_names_mips3264r2, mips_hwr_names_mips3264r2 }, /* For stock MIPS64, disassemble all applicable MIPS-specified ASEs. */ { "mips64", 1, bfd_mach_mipsisa64, CPU_MIPS64, ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX, - mips_cp0_names_mips3264 }, + mips_cp0_names_mips3264, NULL }, { "sb1", 1, bfd_mach_mips_sb1, CPU_SB1, ISA_MIPS64 | INSN_MIPS3D | INSN_SB1, - mips_cp0_names_sb1 }, + mips_cp0_names_sb1, NULL }, /* This entry, mips16, is here only for ISA/processor selection; do not print its name. */ { "", 1, bfd_mach_mips16, CPU_MIPS16, ISA_MIPS3 | INSN_MIPS16, - NULL }, + NULL, NULL }, }; /* ISA and processor type to disassemble for, and register names to use. @@ -239,6 +269,7 @@ static int mips_isa; static const char * const *mips_gpr_names; static const char * const *mips_fpr_names; static const char * const *mips_cp0_names; +static const char * const *mips_hwr_names; static const struct mips_abi_choice *choose_abi_by_name PARAMS ((const char *, unsigned int)); @@ -317,12 +348,13 @@ set_default_mips_dis_options (info) const struct mips_arch_choice *chosen_arch; /* Defaults: mipsIII/r3000 (?!), (o)32-style ("oldabi") GPR names, - and numeric FPR and CP0 register names. */ + and numeric FPR, CP0 register, and HWR names. */ mips_isa = ISA_MIPS3; mips_processor = CPU_R3000; mips_gpr_names = mips_gpr_names_oldabi; mips_fpr_names = mips_fpr_names_numeric; mips_cp0_names = mips_cp0_names_numeric; + mips_hwr_names = mips_hwr_names_numeric; /* If an ELF "newabi" binary, use the n32/(n)64 GPR names. */ if (info->flavour == bfd_target_elf_flavour && info->symbols != NULL) @@ -348,6 +380,8 @@ set_default_mips_dis_options (info) mips_isa = chosen_arch->isa; if (chosen_arch->cp0_names != NULL) mips_cp0_names = chosen_arch->cp0_names; + if (chosen_arch->hwr_names != NULL) + mips_hwr_names = chosen_arch->hwr_names; } #endif } @@ -406,6 +440,15 @@ parse_mips_dis_option (option, len) return; } + if (strncmp("hwr-names", option, optionlen) == 0 + && strlen("hwr-names") == optionlen) + { + chosen_arch = choose_arch_by_name (val, vallen); + if (chosen_arch != NULL && chosen_arch->hwr_names != NULL) + mips_hwr_names = chosen_arch->hwr_names; + return; + } + if (strncmp("reg-names", option, optionlen) == 0 && strlen("reg-names") == optionlen) { @@ -426,6 +469,8 @@ parse_mips_dis_option (option, len) { if (chosen_arch->cp0_names != NULL) mips_cp0_names = chosen_arch->cp0_names; + if (chosen_arch->hwr_names != NULL) + mips_hwr_names = chosen_arch->hwr_names; } return; } @@ -467,15 +512,16 @@ parse_mips_dis_options (options) /* Print insn arguments for 32/64-bit code. */ -static void +static int print_insn_arg (d, l, pc, info) const char *d; register unsigned long int l; bfd_vma pc; struct disassemble_info *info; { - int op, delta; + int op, delta, consumed; + consumed = 1; switch (*d) { case ',': @@ -486,6 +532,42 @@ print_insn_arg (d, l, pc, info) (*info->fprintf_func) (info->stream, "%c", *d); break; + case '+': + /* Extension character; switch for second char. */ + d++; + consumed++; + switch (*d) + { + case 'A': + (*info->fprintf_func) (info->stream, "0x%x", + (l >> OP_SH_SHAMT) & OP_MASK_SHAMT); + break; + + case 'B': + (*info->fprintf_func) (info->stream, "0x%x", + (((l >> OP_SH_INSMSB) & OP_MASK_INSMSB) + - ((l >> OP_SH_SHAMT) & OP_MASK_SHAMT) + + 1)); + break; + + case 'C': + (*info->fprintf_func) (info->stream, "0x%x", + (((l >> OP_SH_EXTMSBD) & OP_MASK_EXTMSBD) + + 1)); + break; + + default: + /* xgettext:c-format */ + (*info->fprintf_func) (info->stream, + _("# internal error, undefined extension sequence (+%c)"), + *d); + /* Do not eat the trailing newline. */ + if (*d == '\0') + consumed--; + break; + } + break; + case 's': case 'b': case 'r': @@ -653,6 +735,11 @@ print_insn_arg (d, l, pc, info) (l >> OP_SH_RD) & OP_MASK_RD); break; + case 'K': + (*info->fprintf_func) (info->stream, "%s", + mips_hwr_names[(l >> OP_SH_RD) & OP_MASK_RD]); + break; + case 'N': (*info->fprintf_func) (info->stream, "$fcc%d", (l >> OP_SH_BCC) & OP_MASK_BCC); @@ -737,6 +824,8 @@ print_insn_arg (d, l, pc, info) *d); break; } + + return consumed; } /* Check if the object uses NewABI conventions. */ @@ -843,9 +932,16 @@ print_insn_mips (memaddr, word, info) d = op->args; if (d != NULL && *d != '\0') { + int consumed; + (*info->fprintf_func) (info->stream, "\t"); - for (; *d != '\0'; d++) - print_insn_arg (d, word, memaddr, info); + while (*d != '\0') + { + /* print_insn_arg will not eat the trailing NUL + of (erroneous) multi-character strings. */ + consumed = print_insn_arg (d, word, memaddr, info); + d += consumed; + } } return INSNLEN; @@ -1513,12 +1609,17 @@ with the -M switch (multiple options should be separated by commas):\n")); specified architecture.\n\ Default: based on binary being disassembled.\n")); + fprintf (stream, _("\n\ + hwr-names=ARCH Print HWR names according to specified \n\ + architecture.\n\ + Default: based on binary being disassembled.\n")); + fprintf (stream, _("\n\ reg-names=ABI Print GPR and FPR names according to\n\ specified ABI.\n")); fprintf (stream, _("\n\ - reg-names=ARCH Print CP0 register names according to\n\ + reg-names=ARCH Print CP0 register and HWR names according to\n\ specified architecture.\n")); fprintf (stream, _("\n\ diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 61a2ebd79a5..c35aa065ce7 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -4,7 +4,8 @@ Contributed by Ralph Campbell and OSF Commented and modified by Ian Lance Taylor, Cygnus Support Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc. - MIPS-3D and MDMX support added by Broadcom Corporation (SiByte). + MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom + Corporation (SiByte). This file is part of GDB, GAS, and the GNU binutils. @@ -85,6 +86,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * #define I5 INSN_ISA5 #define I32 INSN_ISA32 #define I64 INSN_ISA64 +#define I33 INSN_ISA32R2 /* MIPS64 MIPS-3D ASE support. */ #define I16 INSN_MIPS16 @@ -137,8 +139,9 @@ const struct mips_opcode mips_builtin_opcodes[] = /* name, args, match, mask, pinfo, membership */ {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I4|I32|G3 }, {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 }, -{"nop", "", 0x00000000, 0xffffffff, 0, I1 }, -{"ssnop", "", 0x00000040, 0xffffffff, 0, I32|N55 }, +{"nop", "", 0x00000000, 0xffffffff, 0, I1 }, /* sll */ +{"ssnop", "", 0x00000040, 0xffffffff, 0, I32|N55 }, /* sll */ +{"ehb", "", 0x000000c0, 0xffffffff, 0, I33 }, /* sll */ {"li", "t,j", 0x24000000, 0xffe00000, WR_t, I1 }, /* addiu */ {"li", "t,i", 0x34000000, 0xffe00000, WR_t, I1 }, /* ori */ {"li", "t,I", 0, (int) M_LI, INSN_MACRO, I1 }, @@ -478,6 +481,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b, I3 }, {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b, I3 }, {"deret", "", 0x4200001f, 0xffffffff, 0, I32|G2 }, +{"di", "", 0x41606000, 0xffffffff, WR_t|WR_C0, I33 }, +{"di", "t", 0x41606000, 0xffe0ffff, WR_t|WR_C0, I33 }, /* For ddiv, see the comments about div. */ {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 }, {"ddiv", "d,v,t", 0, (int) M_DDIV_3, INSN_MACRO, I3 }, @@ -574,7 +579,10 @@ const struct mips_opcode mips_builtin_opcodes[] = {"dsub", "d,v,I", 0, (int) M_DSUB_I, INSN_MACRO, I3 }, {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t, I3 }, {"dsubu", "d,v,I", 0, (int) M_DSUBU_I, INSN_MACRO, I3 }, +{"ei", "", 0x41606020, 0xffffffff, WR_t|WR_C0, I33 }, +{"ei", "t", 0x41606020, 0xffe0ffff, WR_t|WR_C0, I33 }, {"eret", "", 0x42000018, 0xffffffff, 0, I3|I32 }, +{"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, I33 }, {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, I3 }, {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S, I3 }, {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_D, I2 }, @@ -583,7 +591,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"flushd", "", 0xbc020000, 0xffffffff, 0, L1 }, {"flushid", "", 0xbc030000, 0xffffffff, 0, L1 }, {"hibernate","", 0x42000023, 0xffffffff, 0, V1 }, +{"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, I33 }, {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, +{"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD|RD_s, I33 }, {"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, I1 }, /* jr */ /* SVR4 PIC code requires special handling for j, so it must be a macro. */ @@ -594,6 +604,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"j", "a", 0x08000000, 0xfc000000, UBD, I1 }, {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, I1 }, {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, I1 }, +{"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, UBD|RD_s|WR_d, I33 }, +{"jalr.hb", "d,s", 0x00000409, 0xfc1f07ff, UBD|RD_s|WR_d, I33 }, /* SVR4 PIC code requires special handling for jal, so it must be a macro. */ {"jal", "d,s", 0, (int) M_JAL_2, INSN_MACRO, I1 }, @@ -705,8 +717,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD|WR_t|RD_C0, I32 }, {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 }, {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I1 }, +{"mfhc1", "t,S", 0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I33 }, +{"mfhc1", "t,G", 0x44600000, 0xffe007ff, LCD|WR_t|RD_S|FP_S, I33 }, {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2, I1 }, {"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD|WR_t|RD_C2, I32 }, +{"mfhc2", "t,i", 0x48600000, 0xffe00000, LCD|WR_t|RD_C2, I33 }, {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3, I1 }, {"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, I32 }, {"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, N5 }, @@ -765,8 +780,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, I32 }, {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 }, {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I1 }, +{"mthc1", "t,S", 0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I33 }, +{"mthc1", "t,G", 0x44e00000, 0xffe007ff, COD|RD_t|WR_S|FP_S, I33 }, {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC, I1 }, {"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, I32 }, +{"mthc2", "t,i", 0x48e00000, 0xffe00000, COD|RD_t|WR_C2|WR_CC, I33 }, {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, I1 }, {"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, I32 }, {"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, N5 }, @@ -890,6 +908,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HILO, I1 }, {"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO, I1 }, {"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO, I1 }, +{"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_t, I33 }, +{"rdpgpr", "d,w", 0x41400000, 0xffe007ff, WR_d, I33 }, {"rfe", "", 0x42000010, 0xffffffff, 0, I1|T3 }, {"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX }, {"rnau.ob", "X,Q", 0x78000021, 0xfc20f83f, WR_D|RD_MACC|RD_T|FP_D, MX|SB1 }, @@ -901,8 +921,13 @@ const struct mips_opcode mips_builtin_opcodes[] = {"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I1 }, {"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I1 }, {"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I1 }, -{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5 }, -{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5 }, +{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, N5|I33 }, +{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, N5|I33 }, +{"rotl", "d,v,t", 0, (int) M_ROL, INSN_MACRO, I33 }, +{"rotl", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, I33 }, +{"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, I33 }, +{"rotr", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, I33 }, +{"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, I33 }, {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, I3 }, {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S, I3 }, {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_D, I2 }, @@ -950,6 +975,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, I3 }, {"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, I3 }, {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b, I4 }, +{"seb", "d,w", 0x7C000420, 0xffe007ff, WR_d|RD_t, I33 }, +{"seh", "d,w", 0x7C000620, 0xffe007ff, WR_d|RD_t, I33 }, {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, L1 }, {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, L1 }, {"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, I1 }, @@ -1057,6 +1084,7 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2|G1 }, {"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, I2 }, {"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC, I2 }, +{"synci", "o(b)", 0x041f0000, 0xfc1f0000, SM|RD_b, I33 }, {"syscall", "", 0x0000000c, 0xffffffff, TRAP, I1 }, {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP, I1 }, {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|TRAP, I2 }, @@ -1125,6 +1153,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"wait", "J", 0x42000020, 0xfe00003f, TRAP, I32|N55 }, {"waiti", "", 0x42000020, 0xffffffff, TRAP, L1 }, {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, L1 }, +{"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_t, I33 }, +{"wsbh", "d,w", 0x7C0000a0, 0xffe007ff, WR_d|RD_t, I33 }, {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, I1 }, {"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, I1 }, {"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, MX|SB1 }, -- 2.30.2