From afa5920a97b539b111a2f1593717ee7ef14f7bdb Mon Sep 17 00:00:00 2001 From: Oleg Endo Date: Tue, 26 May 2015 22:32:11 +0000 Subject: [PATCH] re PR target/65979 ([SH] Wrong code is generated with stage1 compiler) PR target/65979 * config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and take into account the case that operands[1] and operands[2] are the same register. From-SVN: r223721 --- gcc/ChangeLog | 7 +++++++ gcc/config/sh/sh.md | 9 +++++++-- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 69289e6a8df..39d297d5a2f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-05-26 Oleg Endo + + PR target/65979 + * config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and + take into account the case that operands[1] and operands[2] + are the same register. + 2015-05-26 Michael Matz PR middle-end/66251 diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index 2d95b9c1e22..634a61250a7 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -14722,7 +14722,11 @@ label: || REGNO (operands[2]) == REGNO (operands[5]))" [(const_int 0)] { - sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3])); + if (REGNO (operands[1]) == REGNO (operands[2])) + operands[2] = gen_rtx_REG (SImode, REGNO (operands[0])); + + sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2], + operands[3]))); emit_insn (gen_tstsi_t (operands[2], gen_rtx_REG (SImode, (REGNO (operands[1]))))); }) @@ -14749,7 +14753,8 @@ label: || REGNO (operands[2]) == REGNO (operands[5]))" [(const_int 0)] { - sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3])); + sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2], + operands[3]))); emit_insn (gen_tstsi_t (operands[2], gen_rtx_REG (SImode, (REGNO (operands[1]))))); }) -- 2.30.2