From afecd85d0b4e03bf60024366ef66d67a6a30bef9 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 18 Nov 2020 11:24:28 +0000 Subject: [PATCH] --- openpower/sv/16_bit_compressed.mdwn | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn index bad8b996d..44ca28823 100644 --- a/openpower/sv/16_bit_compressed.mdwn +++ b/openpower/sv/16_bit_compressed.mdwn @@ -225,10 +225,12 @@ is "nop" Notes: +* All-zeros being an illegal instruction is normal for ISAs. Ensuring that + this remains true at all times i.e. for both 10 bit and 16 bit mode is + common sense. * The 10-bit nop (bit 15, M=1) is intended for circumstances - where alignment to 32-bit before rwturning to v3.0B is required. - M=1 being an indication - "return to Standard v3.0B Encoding Mode" + where alignment to 32-bit before returning to v3.0B is required. + M=1 being an indication "return to Standard v3.0B Encoding Mode". * The 16-bit nop (bit 0, N=1) is intended for circumstances where a return to Standard v3.0B Encoding is required for one cycle but one cycle where alignment to a 32-bit boundary is needed @@ -236,6 +238,8 @@ Notes: the 10-bit variant can be used, because each one returns to Standard v3.0B Encoding Mode, each time. +In essence the 2 nops are needed due to there being 2 different C forms: 10 and 16 bit. + ### Branch | 16-bit mode | | 10-bit mode | -- 2.30.2