From b00deed66f6f3c6bf820d39d5c42f873ca081526 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 28 Aug 2018 19:13:18 -0400 Subject: [PATCH] radeonsi: adjust and simplify max_alloc_size determination MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Tested-by: Dieter Nützel --- src/amd/common/ac_gpu_info.c | 16 ++++++++-------- .../winsys/radeon/drm/radeon_drm_winsys.c | 8 +++++--- 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index bfaff45219f..766ad835476 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -255,9 +255,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, info->gart_size = meminfo.gtt.total_heap_size; info->vram_size = meminfo.vram.total_heap_size; info->vram_vis_size = meminfo.cpu_accessible_vram.total_heap_size; - - info->max_alloc_size = MAX2(meminfo.vram.max_allocation, - meminfo.gtt.max_allocation); } else { /* This is a deprecated interface, which reports usable sizes * (total minus pinned), but the pinned size computation is @@ -289,11 +286,6 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, info->gart_size = gtt.heap_size; info->vram_size = vram.heap_size; info->vram_vis_size = vram_vis.heap_size; - - /* The kernel can split large buffers in VRAM but not in GTT, so large - * allocations can fail or cause buffer movement failures in the kernel. - */ - info->max_alloc_size = MAX2(info->vram_size * 0.9, info->gart_size * 0.7); } /* Set chip identification. */ @@ -331,6 +323,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, info->has_dedicated_vram = !(amdinfo->ids_flags & AMDGPU_IDS_FLAGS_FUSION); + /* The kernel can split large buffers in VRAM but not in GTT, so large + * allocations can fail or cause buffer movement failures in the kernel. + */ + if (info->has_dedicated_vram) + info->max_alloc_size = info->vram_size * 0.8; + else + info->max_alloc_size = info->gart_size * 0.7; + /* Set hardware information. */ info->gds_size = gds.gds_total_size; info->gds_gfx_partition_size = gds.gds_gfx_partition_size; diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 3560c34c17a..cf07a8d8e26 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -362,11 +362,13 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) if (ws->info.drm_minor < 49) ws->info.vram_vis_size = MIN2(ws->info.vram_vis_size, 256*1024*1024); - /* Radeon allocates all buffers as contigous, which makes large allocations + /* Radeon allocates all buffers contiguously, which makes large allocations * unlikely to succeed. */ - ws->info.max_alloc_size = MAX2(ws->info.vram_size, ws->info.gart_size) * 0.7; if (ws->info.has_dedicated_vram) - ws->info.max_alloc_size = MIN2(ws->info.vram_size * 0.7, ws->info.max_alloc_size); + ws->info.max_alloc_size = ws->info.vram_size * 0.7; + else + ws->info.max_alloc_size = ws->info.gart_size * 0.7; + if (ws->info.drm_minor < 40) ws->info.max_alloc_size = MIN2(ws->info.max_alloc_size, 256*1024*1024); /* Both 32-bit and 64-bit address spaces only have 4GB. */ -- 2.30.2