From b027470f4234f042f2a736ee5e830f3b20acadca Mon Sep 17 00:00:00 2001 From: Michael Hayes Date: Sun, 6 Feb 2000 10:36:26 +0000 Subject: [PATCH] c4x.md (*ldi_on_overflow): New pattern. 2000-02-06 Michael Hayes * config/c4x/c4x.md (*ldi_on_overflow): New pattern. (fixuns_truncqfqi2): Use it. From-SVN: r31823 --- gcc/ChangeLog | 5 +++++ gcc/config/c4x/c4x.md | 47 ++++++++++++++++++++++++------------------- 2 files changed, 31 insertions(+), 21 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4e79f5f4511..85ddc65e356 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2000-02-06 Michael Hayes + + * config/c4x/c4x.md (*ldi_on_overflow): New pattern. + (fixuns_truncqfqi2): Use it. + 2000-02-06 Richard Henderson * i386.c (ix86_agi_dependant): Handle pro_epilogue_adjust_stack diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md index 38e205275f6..27173c38a66 100644 --- a/gcc/config/c4x/c4x.md +++ b/gcc/config/c4x/c4x.md @@ -453,6 +453,7 @@ ; 10 RSQRF ; 11 loadqf_int ; 12 storeqf_int +; 13 Conditional load on overflow ; 22 rptb_init ; @@ -3752,32 +3753,27 @@ DONE;") (define_expand "fixuns_truncqfqi2" - [(set (match_dup 2) (match_dup 5)) - (set (reg:CC 21) - (compare:CC (match_operand:QF 1 "src_operand" "fHm") - (match_dup 2))) - (set (match_dup 2) - (if_then_else:QF (lt (reg:CC 21) (const_int 0)) - (match_dup 4) - (match_dup 2))) - (parallel [(set (match_dup 2) - (plus:QF (match_dup 2) (match_dup 2))) - (clobber (reg:CC_NOOV 21))]) - (parallel [(set (match_dup 2) - (minus:QF (match_dup 1) (match_dup 2))) + [(parallel [(set (match_dup 2) + (fix:QI (match_operand:QF 1 "src_operand" "fHm"))) + (clobber (reg:CC 21))]) + (parallel [(set (match_dup 3) + (minus:QF (match_dup 1) (match_dup 5))) (clobber (reg:CC_NOOV 21))]) - (parallel [(set (match_operand:QI 0 "reg_operand" "=r") - (fix:QI (match_dup 2))) - (clobber (reg:CC 21))])] + (parallel [(set (reg:CC 21) + (compare:CC (fix:QI (match_dup 3)) + (const_int 0))) + (set (match_dup 4) + (fix:QI (match_dup 3)))]) + (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13)) + (use (reg:CC 21))]) + (set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))] "" - "operands[2] = gen_reg_rtx (QFmode); + "operands[2] = gen_reg_rtx (QImode); operands[3] = gen_reg_rtx (QFmode); - operands[4] = gen_reg_rtx (QFmode); + operands[4] = gen_reg_rtx (QImode); operands[5] = gen_reg_rtx (QFmode); - emit_move_insn (operands[4], - immed_real_const_1 (REAL_VALUE_ATOF (\"0.0\", QFmode), QFmode)); emit_move_insn (operands[5], - immed_real_const_1 (REAL_VALUE_ATOF (\"2147483648.0\", QFmode), QFmode));") + immed_real_const_1 (REAL_VALUE_ATOF (\"4294967296.0\", QFmode), QFmode));") (define_expand "fixuns_truncqfhi2" [(parallel [(set (match_operand:HI 0 "reg_operand" "") @@ -4141,6 +4137,15 @@ ldi%I1\\t%3,%0" [(set_attr "type" "binary")]) +(define_insn "*ldi_on_overflow" + [(set (match_operand:QI 0 "reg_operand" "=r") + (unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] 13)) + (use (reg:CC 21))] + "" + "@ + ldiv\\t%1,%0" + [(set_attr "type" "binary")]) + ; Move operand 2 to operand 0 if condition (operand 1) is true ; else move operand 3 to operand 0. ; The temporary register is required below because some of the operands -- 2.30.2