From b0344e1de2917ac3abcfdd585e8d8f7222889d74 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 23 Mar 2020 16:20:51 +0000 Subject: [PATCH] clarify --- 3d_gpu/architecture/6600scoreboard.mdwn | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/3d_gpu/architecture/6600scoreboard.mdwn b/3d_gpu/architecture/6600scoreboard.mdwn index 2840af516..9dd1b4c72 100644 --- a/3d_gpu/architecture/6600scoreboard.mdwn +++ b/3d_gpu/architecture/6600scoreboard.mdwn @@ -215,7 +215,10 @@ preserved. The suggestion from Mitch Alsup was to use a match system based on bits 4 thru 10/11 of the address. The idea being: we don't care if the matching is "too inclusive", i.e. we don't care if it includes addresses that don't -actually overlap: we care if it were to **miss** some addresses that do +actually overlap, because this just means "oh dear some LD/STs do not +happen concurrently, they happen a few cycles later" (translation: Big Deal) + +What we care about is if it were to **miss** some addresses that **do** actually overlap. Therefore it is perfectly acceptable to use only a few bits of the address. This is fortunate because the matching has to be done in a huge NxN Pascal's Triangle, and if we were to compare against -- 2.30.2