From b0f9e43270288ca39fe7206b0c41c98a1443cb5e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 13 Aug 2019 12:40:25 +0100 Subject: [PATCH] add pseudocode for swizzle --- simple_v_extension/abridged_spec.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/simple_v_extension/abridged_spec.mdwn b/simple_v_extension/abridged_spec.mdwn index 9b4eeefc6..0a41c01ec 100644 --- a/simple_v_extension/abridged_spec.mdwn +++ b/simple_v_extension/abridged_spec.mdwn @@ -259,7 +259,7 @@ Simplified pseudocode example, when SUBVL=4 and swizzle is set on rd: rs1 = int_vec[rs1].isvector ? int_vec[rs1].regidx : rs1; rs2 = int_vec[rs2].isvector ? int_vec[rs2].regidx : rs2; - # loop on VL: SUBVL loop is unrolled + # loop on VL: SUBVL loop is unrolled (SUBVL=4) for (i in 0; i < VL; i++) ireg[rd+i*4+x] = OPERATION(ireg[rs1+i*4+0], ireg[rs2+i*4+0]) ireg[rd+i*4+y] = OPERATION(ireg[rs1+i*4+1], ireg[rs2+i*4+1]) -- 2.30.2