From b137f9fcd31b15609376d88f9f80af145fe12ca0 Mon Sep 17 00:00:00 2001
From: Eric Christopher <echristo@gcc.gnu.org>
Date: Thu, 7 Feb 2002 23:43:23 +0000
Subject: [PATCH] crtn.asm: Cleanup #ifdefs.

2002-02-07  Eric Christopher  <echristo@redhat.com>

	* config/mips/crtn.asm: Cleanup #ifdefs.

Add ChangeLog entry for previous patch that didn't seem to make it.

From-SVN: r49595
---
 gcc/ChangeLog            | 26 +++++++++++++++++++++++---
 gcc/config/mips/crtn.asm | 35 ++++++++++++++++-------------------
 2 files changed, 39 insertions(+), 22 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 43107d328e0..319bbd0d697 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,26 @@
+2002-02-07  Eric Christopher  <echristo@redhat.com>
+
+	* config/mips/crtn.asm: Cleanup #ifdefs.
+
+2002-02-07  Eric Christopher  <echristo@redhat.com>
+
+	* config/mips/crti.asm: Add changes for mips16. mips16 uses
+	register 7 as RA instead of $31.
+	* config/mips/crtn.asm: Ditto.
+	* config/mips/mips.c (mips_move_2words): Add case for
+	TARGET_MIPS16 when HOST_BITS_PER_WIDE_INT >= 64.
+	(compute_frame_size): Fix typo.
+	(save_restore_insns): Ditto.  Make documentation about using
+	register $7 as return register more precise.
+	(mips_expand_epilogue): Fix comment. Add code to work around not
+	being able to add to the stack pointer directly.
+	* config/mips/mips.h (EH_RETURN_DATA_REGNO): Change register number
+	to 2 for TARGET_MIPS16 as we need 6 and 7 as clobbers in the
+	epilogue.
+
 2002-02-07  Tom Rix  <trix@redhat.com>
 
-	* config/rs6000/rs6000.c (reg_or_aligned_short_operand): New. For 
+	* config/rs6000/rs6000.c (reg_or_aligned_short_operand): New. For
 	immediates in ldu and stdu DS opcode field.
 	* config/rs6000/rs6000.md (movdi_update, movdi_update1): Use.
 	* config/rs6000/rs6000-protos.h: Add reg_or_aligned_short_operand.
@@ -285,7 +305,7 @@ Mon Feb	 4 19:23:19 2002  Richard Kenner  <kenner@vlsi1.ultra.nyu.edu>
 	(set_reg_plus_d): Likewise.
 	(hppa_expand_prologue): Likewise.
 	(hppa_expand_epilogue): Likewise.
-	
+
 2002-02-04  John David Anglin  <dave@hiauly1.hia.nrc.ca>
 
 	* unwind-dw2-fde-glibc.c: Define _GNU_SOURCE if not defined.
@@ -330,7 +350,7 @@ Mon Feb	 4 19:23:19 2002  Richard Kenner  <kenner@vlsi1.ultra.nyu.edu>
 
 	* config/arm/arm.c (arm_hard_regno_mode_ok): Allow any value in
 	any geenral register.
-	
+
 2001-02-04  Bernd Schmidt  <bernds@redhat.com>
 
 	* cfgrtl.c (force_nonfallthru_and_redirect): Don't try to redirect
diff --git a/gcc/config/mips/crtn.asm b/gcc/config/mips/crtn.asm
index 54f886a216f..54ab2a5099d 100644
--- a/gcc/config/mips/crtn.asm
+++ b/gcc/config/mips/crtn.asm
@@ -2,41 +2,38 @@
    Return spill offset of 40 and 20.  Aligned to 16 bytes for n32.  */
 
 	.section .init,"ax",@progbits
+#ifdef	__mips16
+/* The mips16 uses $7 for a return address. We use that here too.  */
+	lw	$7,20($sp)
+	addu	$sp,$sp,32
+
+	j	$7
+#else
 #ifdef __mips64
 	ld      $31,40($sp)
 	daddu	$sp,$sp,48
 #else
-#ifndef __mips16
 	lw	$31,20($sp)
 	addu	$sp,$sp,32
-#else
-/* The mips16 uses $7 for a return address. We use that here too.  */
-	lw	$7,20($sp)
-	addu	$sp,$sp,32
-
-	j	$7
-#endif
 #endif
-#ifndef __mips16
 	j	$31
+
 #endif
 
 	.section .fini,"ax",@progbits
-#ifdef __mips64
-	ld	$31,40($sp)
-	daddu	$sp,$sp,48
-#else
-#ifndef __mips16
-	lw	$31,20($sp)
-	addu	$sp,$sp,32
-#else
+#ifdef	__mips16
 /* The mips16 uses $7 for a return address. We use that here too.  */
 	lw	$7,20($sp)
 	addu	$sp,$sp,32
 
 	j	$7
+#else
+#ifdef	__mips64
+	ld	$31,40($sp)
+	daddu	$sp,$sp,48
+#else
+	lw	$31,20($sp)
+	addu	$sp,$sp,32
 #endif
-#endif
-#ifndef __mips16
 	j	$31
 #endif
-- 
2.30.2