From b165f6b3d1f912fd5df86a6907e5e590994bda91 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 16 Dec 2020 01:22:09 +0000 Subject: [PATCH] --- openpower/sv/svp_rewrite/svp64.mdwn | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn index 760970f30..dda30fd4f 100644 --- a/openpower/sv/svp_rewrite/svp64.mdwn +++ b/openpower/sv/svp_rewrite/svp64.mdwn @@ -25,12 +25,25 @@ defined in the Prefix Fields section. ## Remapped Encoding Fields +There are two different encodings: single-predication (typically arithmetic operations i.e. with more than one source register) and twin-predication (one source, one destination). They require different encodings + +Single Predication (2+ src ops): + | Remapped Encoding Field Name | Field bits | Description | |------------------------------|------------|----------------| | MASKMODE | `0` | Predicate Mode | | MASK | `1:3` | Execution Mask | | TBD | `4:23` | TBD | +Twin Predication (1 src, 1 dest): + +| Remapped Encoding Field Name | Field bits | Description | +|------------------------------|------------|----------------| +| MASKMODE | `0` | Predicate Mode | +| SRCMASK | `1:3` | Source Mask | +| DSTMASK | `4:6` | Dest Mask | +| TBD | `7:23` | TBD | + ## Predicate MASK Encoding One bit indicates the mode: CR or Int predication. The two types may not be mixed. -- 2.30.2