From b1afed0d7cac9a7078d07eae1eac1f4e5c7a1207 Mon Sep 17 00:00:00 2001 From: shriya Date: Wed, 18 Oct 2023 12:06:26 +0100 Subject: [PATCH] --- openpower/sv/biginteger/analysis.mdwn | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn index ab0f2201a..8d94d2ecd 100644 --- a/openpower/sv/biginteger/analysis.mdwn +++ b/openpower/sv/biginteger/analysis.mdwn @@ -227,8 +227,8 @@ which are scalar initialisation: li r16, 0 # zero accumulator addic r16, r16, 0 # CA to zero as well - sv.madde r0.v, r8.v, r17, r16 # mul vector - sv.adde r24.v, r24.v, r0.v # big-add row to result + sv.maddedu *r0, *r8, r17, r16 # mul vector + sv.adde *r24, *r24, *r0 # big-add row to result Normally, in a Scalar ISA, the use of a register as both a source and destination like this would create costly Dependency Hazards, so -- 2.30.2