From b1b969f670c50a15110fd41527ccbc7e885e1cdd Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 29 Jan 2012 16:56:02 +0100 Subject: [PATCH] r600g: don't use r600_context_reg on evergreen Just getting rid of things which use the register mask. Reviewed-by: Dave Airlie Reviewed-by: Alex Deucher --- .../drivers/r600/evergreen_hw_context.c | 30 +++++++++++-------- src/gallium/drivers/r600/evergreen_state.c | 1 + src/gallium/drivers/r600/r600.h | 1 + .../drivers/r600/r600_hw_context_priv.h | 2 +- src/gallium/drivers/r600/r600_pipe.h | 1 + src/gallium/drivers/r600/r600_state_common.c | 2 ++ 6 files changed, 23 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c index 0463922ccf9..f732ea38913 100644 --- a/src/gallium/drivers/r600/evergreen_hw_context.c +++ b/src/gallium/drivers/r600/evergreen_hw_context.c @@ -1148,22 +1148,12 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr if (draw->indices) { ndwords = 11; } + if (ctx->num_cs_dw_queries_suspend) + ndwords += 6; + /* when increasing ndwords, bump the max limit too */ assert(ndwords <= R600_MAX_DRAW_CS_DWORDS); - /* queries need some special values - * (this is non-zero if any query is active) */ - if (ctx->num_cs_dw_queries_suspend) { - r600_context_reg(ctx, - R_028004_DB_COUNT_CONTROL, - S_028004_PERFECT_ZPASS_COUNTS(1), - S_028004_PERFECT_ZPASS_COUNTS(1)); - r600_context_reg(ctx, - R_02800C_DB_RENDER_OVERRIDE, - S_02800C_NOOP_CULL_DISABLE(1), - S_02800C_NOOP_CULL_DISABLE(1)); - } - r600_need_cs_space(ctx, 0, TRUE); assert(ctx->pm4_cdwords + ctx->pm4_dirty_cdwords + ndwords < RADEON_MAX_CMDBUF_DWORDS); @@ -1182,6 +1172,20 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr ctx->streamout_start = FALSE; } + /* queries need some special values + * (this is non-zero if any query is active) */ + if (ctx->num_cs_dw_queries_suspend) { + pm4 = &ctx->pm4[ctx->pm4_cdwords]; + pm4[0] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0); + pm4[1] = (R_028004_DB_COUNT_CONTROL - EVERGREEN_CONTEXT_REG_OFFSET) >> 2; + pm4[2] = S_028004_PERFECT_ZPASS_COUNTS(1); + pm4[3] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0); + pm4[4] = (R_02800C_DB_RENDER_OVERRIDE - EVERGREEN_CONTEXT_REG_OFFSET) >> 2; + pm4[5] = draw->db_render_override | S_02800C_NOOP_CULL_DISABLE(1); + ctx->pm4_cdwords += 6; + ndwords -= 6; + } + /* draw packet */ pm4 = &ctx->pm4[ctx->pm4_cdwords]; pm4[0] = PKT3(PKT3_INDEX_TYPE, 0, ctx->predicate_drawing); diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 8aa8b776227..248411021f8 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -865,6 +865,7 @@ static void *evergreen_create_dsa_state(struct pipe_context *ctx, r600_pipe_state_add_reg(rstate, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 0x0, NULL, 0); r600_pipe_state_add_reg(rstate, R_028AC8_DB_PRELOAD_CONTROL, 0x0, NULL, 0); r600_pipe_state_add_reg(rstate, R_028B70_DB_ALPHA_TO_MASK, 0x0000AA00, NULL, 0); + dsa->db_render_override = db_render_override; return rstate; } diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h index a51e6af36c1..c3de51f8373 100644 --- a/src/gallium/drivers/r600/r600.h +++ b/src/gallium/drivers/r600/r600.h @@ -256,6 +256,7 @@ struct r600_draw { u32 vgt_index_type; u32 vgt_draw_initiator; u32 indices_bo_offset; + unsigned db_render_override; struct r600_resource *indices; }; diff --git a/src/gallium/drivers/r600/r600_hw_context_priv.h b/src/gallium/drivers/r600/r600_hw_context_priv.h index 2ad56242059..c7d5b6ad9d8 100644 --- a/src/gallium/drivers/r600/r600_hw_context_priv.h +++ b/src/gallium/drivers/r600/r600_hw_context_priv.h @@ -30,7 +30,7 @@ #include "util/u_hash_table.h" #include "os/os_thread.h" -#define R600_MAX_DRAW_CS_DWORDS 11 +#define R600_MAX_DRAW_CS_DWORDS 17 #define PKT_COUNT_C 0xC000FFFF #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16) diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index bf32ddc2821..0c6d72dc72f 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -125,6 +125,7 @@ struct r600_pipe_blend { struct r600_pipe_dsa { struct r600_pipe_state rstate; unsigned alpha_ref; + unsigned db_render_override; ubyte valuemask[2]; ubyte writemask[2]; }; diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 09a7d730053..501d369feb7 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -781,6 +781,8 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo) r600_context_pipe_state_set(&rctx->ctx, &rctx->vgt); if (rctx->chip_class >= EVERGREEN) { + struct r600_pipe_dsa *dsa = (struct r600_pipe_dsa*)rctx->states[R600_PIPE_STATE_DSA]; + rdraw.db_render_override = dsa->db_render_override; evergreen_context_draw(&rctx->ctx, &rdraw); } else { r600_context_draw(&rctx->ctx, &rdraw); -- 2.30.2