From b1f58428618b90ec7e79df0e113e592b3a68e9f2 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 23 Aug 2004 08:11:40 +0000 Subject: [PATCH] mips.md (*mov_ra): Name previously unnamed MIPS16 $31 store insns. * config/mips/mips.md (*mov_ra): Name previously unnamed MIPS16 $31 store insns. Redefine using :GPR. From-SVN: r86417 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.md | 24 +++++++----------------- 2 files changed, 12 insertions(+), 17 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3f089d55beb..7beb5cb8577 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2004-08-23 Richard Sandiford + + * config/mips/mips.md (*mov_ra): Name previously unnamed MIPS16 + $31 store insns. Redefine using :GPR. + 2004-08-23 Richard Sandiford * config/mips/mips.md (P): New mode macro. diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 781eafe62b2..fa7ee20561b 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3432,13 +3432,13 @@ beq\t%2,%.,1b\;\ ;; memory, since we don't have a constraint to match $31. This ;; instruction can be generated by save_restore_insns. -(define_insn "" - [(set (match_operand:DI 0 "stack_operand" "=m") - (reg:DI 31))] - "TARGET_MIPS16 && TARGET_64BIT" - "sd\t$31,%0" - [(set_attr "type" "store") - (set_attr "mode" "DI")]) +(define_insn "*mov_ra" + [(set (match_operand:GPR 0 "stack_operand" "=m") + (reg:GPR 31))] + "TARGET_MIPS16" + "\t$31,%0" + [(set_attr "type" "store") + (set_attr "mode" "")]) (define_insn "*movdi_32bit" [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,d,m,*x,*d,*B*C*D,*B*C*D,*d,*m") @@ -3555,16 +3555,6 @@ beq\t%2,%.,1b\;\ DONE; }) -;; We can only store $ra directly into a small sp offset. - -(define_insn "" - [(set (match_operand:SI 0 "stack_operand" "=m") - (reg:SI 31))] - "TARGET_MIPS16" - "sw\t$31,%0" - [(set_attr "type" "store") - (set_attr "mode" "SI")]) - ;; The difference between these two is whether or not ints are allowed ;; in FP registers (off by default, use -mdebugh to enable). -- 2.30.2