From b20ec80c5f1fdd044e6313042930d558014677de Mon Sep 17 00:00:00 2001 From: Daniel Benusovich Date: Sun, 21 Apr 2019 18:23:54 -0700 Subject: [PATCH] Use singal passed into plru rather than relying on internal signal --- TLB/src/ariane/tlb.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/TLB/src/ariane/tlb.py b/TLB/src/ariane/tlb.py index 9bff30c5..61f99ce2 100644 --- a/TLB/src/ariane/tlb.py +++ b/TLB/src/ariane/tlb.py @@ -112,6 +112,7 @@ class TLB: #-------------- p = PLRU(self.tlb_entries) + plru_tree = Signal(p.TLBSZ) m.submodules.plru = p # connect PLRU inputs/outputs @@ -121,7 +122,9 @@ class TLB: en.append(tc[i].replace_en_i) m.d.comb += [Cat(*en).eq(p.replace_en_o), # output from PLRU into tags p.lu_hit.eq(hitsel.i), - p.lu_access_i.eq(self.lu_access_i)] + p.lu_access_i.eq(self.lu_access_i), + p.plru_tree.eq(plru_tree)] + m.d.sync += plru_tree.eq(p.plru_tree_o) #-------------- # Sanity checks -- 2.30.2