From b26590f8ab2bc77b6209a98240d465af7d3ee266 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Tue, 6 Jan 2015 23:59:53 +0100 Subject: [PATCH] memory_bram hotfix for memories with width 1 --- passes/memory/memory_bram.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc index 8c7338b91..b212e92ed 100644 --- a/passes/memory/memory_bram.cc +++ b/passes/memory/memory_bram.cc @@ -294,10 +294,10 @@ bool replace_cell(Cell *cell, const rules_t::bram_t &bram, const rules_t::match_ SigSpec rd_data = cell->getPort("\\RD_DATA"); SigSpec rd_addr = cell->getPort("\\RD_ADDR"); - if (match.shuffle_enable) + if (match.shuffle_enable && bram.dbits >= match.shuffle_enable*2) { int bucket_size = bram.dbits / match.shuffle_enable; - log(" Shuffle enable and data bit to accommodate enable buckets of size %d..\n", bucket_size); + log(" Shuffle bit order to accommodate enable buckets of size %d..\n", bucket_size); // extract unshuffled data/enable bits @@ -363,7 +363,7 @@ bool replace_cell(Cell *cell, const rules_t::bram_t &bram, const rules_t::match_ } } - log(" Results of enable shuffling:"); + log(" Results of bit order shuffling:"); for (int v : shuffle_map) log(" %d", v); log("\n"); -- 2.30.2