From b2f19ffc174e77b42cffeda1cb774023dd720966 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sun, 10 Jan 2021 01:25:55 +0000
Subject: [PATCH]

---
 openpower/sv/bitmanip.mdwn | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index 79dea7f36..9acb8fd80 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -97,33 +97,37 @@ another mode selection would be CRs not Ints.
               crregs[BC][i]
         crregs[BT][i] = (imm & (1<<idx)) != 0
 
-# single bit set
+# bitnask set
 
-based on RV bitmanip, instruction format similar to shift
+based on RV bitmanip singlebit set, instruction format similar to shift
 
 ```
-uint_xlen_t sbset(uint_xlen_t RA, uint_xlen_t RB)
+uint_xlen_t bmset(RA, RB, sh)
 {
     int shamt = RB & (XLEN - 1);
-    return RA | (uint_xlen_t(1) << shamt);
+    mask = (2<<sh)-1;
+    return RA | (mask << shamt);
 }
 
-uint_xlen_t sbclr(uint_xlen_t RA, uint_xlen_t RB)
+uint_xlen_t bmclr(RA, RB, sh)
 {
     int shamt = RB & (XLEN - 1);
-    return RA & ~(uint_xlen_t(1) << shamt);
+    mask = (2<<sh)-1;
+    return RA & ~(mask << shamt);
 }
 
-uint_xlen_t sbinv(uint_xlen_t RA, uint_xlen_t RB)
+uint_xlen_t bminv(RA, RB, sh)
 {
     int shamt = RB & (XLEN - 1);
-    return RA ^ (uint_xlen_t(1) << shamt);
+    mask = (2<<sh)-1;
+    return RA ^ (mask << shamt);
 }
 
-uint_xlen_t sbext(uint_xlen_t RA, uint_xlen_t RB)
+uint_xlen_t bmext(RA, RB, sh)
 {
     int shamt = RB & (XLEN - 1);
-    return 1 & (RA >> shamt);
+    mask = (2<<sh)-1;
+    return mask & (RA >> shamt);
 }
 ```
 
-- 
2.30.2