From b31e65bb600deccb25cdac88b8db1144066c307e Mon Sep 17 00:00:00 2001 From: Alan Lawrence Date: Tue, 3 Jun 2014 11:56:24 +0000 Subject: [PATCH] Detect EXT patterns to vec_perm_const, use for EXT intrinsics. (part 2, fix ICE at -O0) * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle location == 0. From-SVN: r211177 --- gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.c | 8 ++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1f09b046bb5..b35b44492d8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-06-03 Alan Lawrence + + * config/aarch64/aarch64.c (aarch64_evpc_ext): allow and handle + location == 0. + 2014-06-03 Alan Lawrence * config/aarch64/aarch64-simd.md (aarch64_rev): diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 65ef84a8ffa..961e5c95f8c 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -9018,9 +9018,6 @@ aarch64_evpc_ext (struct expand_vec_perm_d *d) return false; } - /* The mid-end handles masks that just return one of the input vectors. */ - gcc_assert (location != 0); - switch (d->vmode) { case V16QImode: gen = gen_aarch64_extv16qi; break; @@ -9041,7 +9038,10 @@ aarch64_evpc_ext (struct expand_vec_perm_d *d) if (d->testing_p) return true; - if (BYTES_BIG_ENDIAN) + /* The case where (location == 0) is a no-op for both big- and little-endian, + and is removed by the mid-end at optimization levels -O1 and higher. */ + + if (BYTES_BIG_ENDIAN && (location != 0)) { /* After setup, we want the high elements of the first vector (stored at the LSB end of the register), and the low elements of the second -- 2.30.2