From b3d8993eddd626a16f6b98b633037ce222e4c6d6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 11 Aug 2021 17:28:53 +0100 Subject: [PATCH] whoops test for sv.bc* matched accidentally, use explicit test "svremap" and "svstate" instead --- src/openpower/decoder/isa/caller.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 450f73f5..c0ef32f9 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -1224,7 +1224,7 @@ class ISACaller: # see if srcstep/dststep need skipping over masked-out predicate bits if (self.is_svp64_mode or ins_name == 'setvl' or - ins_name.startswith("sv")): + ins_name in ['svremap', 'svstate']): yield from self.svstate_pre_inc() if self.is_svp64_mode: pre = yield from self.update_new_svstate_steps() -- 2.30.2