From b3f0dbe083c2f4ef159032770a3457f839dcaf40 Mon Sep 17 00:00:00 2001 From: Dmitry Selyutin Date: Wed, 18 Oct 2023 18:26:14 +0300 Subject: [PATCH] test/runner: introduce use_syscall_emu parameter --- src/openpower/test/runner.py | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/src/openpower/test/runner.py b/src/openpower/test/runner.py index 00de4691..6f15a26e 100644 --- a/src/openpower/test/runner.py +++ b/src/openpower/test/runner.py @@ -43,7 +43,9 @@ class SimRunner(StateRunner): running of tests using ISACaller simulation """ - def __init__(self, dut, m, pspec, use_mmap_mem=False): + def __init__(self, dut, m, pspec, + use_mmap_mem=False, + use_syscall_emu=False): super().__init__("sim", SimRunner) self.dut = dut @@ -54,6 +56,7 @@ class SimRunner(StateRunner): None, regreduce_en=regreduce_en, fp_en=fp_en) m.submodules.simdec2 = simdec2 # pain in the neck self.use_mmap_mem = use_mmap_mem + self.use_syscall_emu = use_syscall_emu def prepare_for_test(self, test): self.test = test @@ -77,7 +80,8 @@ class SimRunner(StateRunner): mmu=self.mmu, fpregfile=test.fpregs, initial_fpscr=test.initial_fpscr, - use_mmap_mem=self.use_mmap_mem) + use_mmap_mem=self.use_mmap_mem, + use_syscall_emu=self.use_syscall_emu) # run the loop of the instructions on the current test index = sim.pc.CIA.value//4 @@ -134,7 +138,8 @@ class TestRunnerBase(FHDLTestCase): def __init__(self, tst_data, microwatt_mmu=False, rom=None, svp64=True, run_hdl=None, run_sim=True, allow_overlap=False, inorder=False, fp=False, - use_mmap_mem=False): + use_mmap_mem=False, + use_syscall_emu=False): super().__init__("run_all") self.test_data = tst_data self.microwatt_mmu = microwatt_mmu @@ -146,6 +151,7 @@ class TestRunnerBase(FHDLTestCase): self.run_sim = run_sim self.fp = fp self.use_mmap_mem = use_mmap_mem + self.use_syscall_emu = use_syscall_emu def run_all(self): m = Module() @@ -199,7 +205,9 @@ class TestRunnerBase(FHDLTestCase): state_list.append(hdlrun) if self.run_sim: - simrun = SimRunner(self, m, pspec, use_mmap_mem=self.use_mmap_mem) + simrun = SimRunner(self, m, pspec, + use_mmap_mem=self.use_mmap_mem, + use_syscall_emu=self.use_syscall_emu) state_list.append(simrun) # run core clock at same rate as test clock -- 2.30.2