From b48a77632c4a04343e8380346d58b3343b870e93 Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Sun, 7 Jun 2020 22:34:22 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 368] Need one example unit test of how to run some assembly code "qemu vs simulator" rather than "qemu vs hardware" --- bb/e953a7e40837a6073660309584544271248237 | 74 +++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 bb/e953a7e40837a6073660309584544271248237 diff --git a/bb/e953a7e40837a6073660309584544271248237 b/bb/e953a7e40837a6073660309584544271248237 new file mode 100644 index 0000000..8defd55 --- /dev/null +++ b/bb/e953a7e40837a6073660309584544271248237 @@ -0,0 +1,74 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Sun, 07 Jun 2020 23:34:23 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1ji3rz-0004wE-8z; Sun, 07 Jun 2020 23:34:23 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) id 1ji3rx-0004w3-KZ + for libre-riscv-dev@lists.libre-riscv.org; Sun, 07 Jun 2020 23:34:21 +0100 +From: bugzilla-daemon@libre-soc.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Sun, 07 Jun 2020 22:34:22 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Formal Verification +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: mtnolan2640@gmail.com +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: cc +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: https://bugs.libre-soc.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 368] Need one example unit test of how to + run some assembly code "qemu vs simulator" rather than "qemu vs hardware" +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTM2OAoKTWljaGFlbCBO +b2xhbiA8bXRub2xhbjI2NDBAZ21haWwuY29tPiBjaGFuZ2VkOgoKICAgICAgICAgICBXaGF0ICAg +IHxSZW1vdmVkICAgICAgICAgICAgICAgICAgICAgfEFkZGVkCi0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0K +ICAgICAgICAgICAgICAgICBDQ3wgICAgICAgICAgICAgICAgICAgICAgICAgICAgfG10bm9sYW4y +NjQwQGdtYWlsLmNvbQoKLS0tIENvbW1lbnQgIzEgZnJvbSBNaWNoYWVsIE5vbGFuIDxtdG5vbGFu +MjY0MEBnbWFpbC5jb20+IC0tLQpPaywgSSBkaWQgdGhpcyBxdWl0ZSBhIHdoaWxlIGFnbywgdGVz +dGluZyBhZ2FpbnN0IG15IGNyYXBweSBoYW5kd3JpdHRlbiBweXRob24Kc2ltdWxhdG9yLiBJJ2xs +IGdpdmUgdGVzdGluZyBhZ2FpbnN0IHRoZSBwc2V1ZG9jb2RlIHNpbXVsYXRvciB0b21vcnJvdyBh +IGdvLgoKQmV3YXJlLCBmcm9tIHdoYXQgSSByZW1lbWJlciBvbmx5IGdlbmVyYWwgcHVycG9zZSBy +ZWdpc3RlcnMgd29yay4gcWVtdS1nZGIKc2VlbWVkIHRvIGhhdmUgYSBidWcgKG9yIG1heWJlIGl0 +J3MgcWVtdT8gaWRrKSB3aGVyZSB5b3UgY291bGRuJ3QgcmVhZCBvdXQgWEVSLApDUiwgYW5kIGZy +aWVuZHMgZGlyZWN0bHkgZnJvbSBnZGIuCgotLSAKWW91IGFyZSByZWNlaXZpbmcgdGhpcyBtYWls +IGJlY2F1c2U6CllvdSBhcmUgb24gdGhlIENDIGxpc3QgZm9yIHRoZSBidWcuCl9fX19fX19fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpYnJlLXJpc2N2LWRldiBtYWls +aW5nIGxpc3QKbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxpYnJlLXJpc2N2Lm9yZwpodHRwOi8vbGlz +dHMubGlicmUtcmlzY3Yub3JnL21haWxtYW4vbGlzdGluZm8vbGlicmUtcmlzY3YtZGV2Cg== + -- 2.30.2