From b4ace15028bbfac364e2082931e8d147dfd41c68 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 16 Oct 2020 17:20:56 +0100
Subject: [PATCH]

---
 openpower/openpower/sv/predication.mdwn | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/openpower/openpower/sv/predication.mdwn b/openpower/openpower/sv/predication.mdwn
index f548a9020..2e20d0073 100644
--- a/openpower/openpower/sv/predication.mdwn
+++ b/openpower/openpower/sv/predication.mdwn
@@ -7,3 +7,9 @@
 * idea 3: reading of predicates is from bits of int reg
 * idea 4: SO CR field no longer overflow, contains copy of int reg predicate element bit (passed through).  when OE set?
 
+
+# Requirements
+
+* must be easily implementable in any  microarchitecture including out-of-order 
+* must not compromise or penalise any microarchitectural performance
+* must cover up to 64 elements
-- 
2.30.2