From b4b78e2db461fe40680ebba3bf73e3a3ed8546ed Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Tue, 3 Mar 2015 10:41:00 +0000 Subject: [PATCH] ia64.c (expand_vec_perm_interleave_2): Use gen_raw_REG to create a register in testing mode. * config/ia64/ia64.c (expand_vec_perm_interleave_2): Use gen_raw_REG to create a register in testing mode. From-SVN: r221139 --- gcc/ChangeLog | 5 +++++ gcc/config/ia64/ia64.c | 5 ++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5e11a0f6e2b..3db71ec3789 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2015-03-03 Eric Botcazou + + * config/ia64/ia64.c (expand_vec_perm_interleave_2): Use gen_raw_REG + to create a register in testing mode. + 2015-03-03 Martin Liska Jan Hubicka diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 6ef22d99705..5132d2f94e6 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -11570,7 +11570,10 @@ expand_vec_perm_interleave_2 (struct expand_vec_perm_d *d) gcc_assert (e < nelt); dfinal.perm[i] = e; } - dfinal.op0 = gen_reg_rtx (dfinal.vmode); + if (d->testing_p) + dfinal.op0 = gen_raw_REG (dfinal.vmode, LAST_VIRTUAL_REGISTER + 1); + else + dfinal.op0 = gen_reg_rtx (dfinal.vmode); dfinal.op1 = dfinal.op0; dfinal.one_operand_p = true; dremap.target = dfinal.op0; -- 2.30.2