From b4bb3199a4c08f0a0d079ee230882a568f7adce3 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 20 Jan 2005 02:15:13 -0800 Subject: [PATCH] re PR target/19350 (Compilation with -O1 -ftree-vectorize gives unrecognizable insn on x86.) PR target/19350 * config/i386/i386.c (ix86_expand_vector_move_misalign): Convert to V4SFmode in SSE1 fallback load path. From-SVN: r93957 --- gcc/ChangeLog | 6 ++++++ gcc/config/i386/i386.c | 2 ++ 2 files changed, 8 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fbeebb03165..644d2167613 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-01-19 Richard Henderson + + PR target/19350 + * config/i386/i386.c (ix86_expand_vector_move_misalign): Convert + to V4SFmode in SSE1 fallback load path. + 2005-01-19 Richard Henderson * config/i386/i386.c (ix86_expand_vector_init_one_var): Fix typo diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 447393d45a2..256d38fa0ec 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -7703,6 +7703,8 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) else emit_insn (gen_rtx_CLOBBER (VOIDmode, op0)); + if (mode != V4SFmode) + op0 = gen_lowpart (V4SFmode, op0); m = adjust_address (op1, V2SFmode, 0); emit_insn (gen_sse_loadlps (op0, op0, m)); m = adjust_address (op1, V2SFmode, 8); -- 2.30.2