From b4bfc5bc27956ef33a475831c144506f363bb0e4 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 25 Jan 2021 14:34:18 +0000 Subject: [PATCH] update 22nm page --- 22nm_PowerPI.mdwn | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/22nm_PowerPI.mdwn b/22nm_PowerPI.mdwn index 9a0f8fe11..e572f9f12 100644 --- a/22nm_PowerPI.mdwn +++ b/22nm_PowerPI.mdwn @@ -31,6 +31,10 @@ up to 12-14 different products. - dual 32-bit DDR3/4 interfaces. - Suitable for 4k HD resolution screens and Graphics Card capability. +By re-packaging the same die in different FPGA packages it meets the +needs of different markets without significant NREs. Texas Instruments +and Freescale/NXP and many other companies follow this practice. + **Timeframe from when funding is received:** * 6-8 months for PHY negotiation and supply by IP Vendors (DDR4 is always @@ -55,7 +59,7 @@ These are ballpark estimates: * USD 50,000 for PCIe PHY * USD 50,000 for RGMII Ethernet PHY * USD 50,000 for Libre-licensed PCIe firmware (normally closed binary) -* USD 2,000,000 for Engineers +* USD 2,000,000 for Software and Hardware Engineers * USD 2,000,000 for 22nm Production Masks (1,000,000 for 28nm) * USD 200,000 per 22nm MPW Shuttle Service (test ASICs. 28nm is 100,000) * USD 200,000 estimated for other PHYs (UART, SD/MMC, I2C, SPI) -- 2.30.2