From b55f342bdd8bec16b727a5889c589dd85c5ca3c3 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Fri, 25 May 2018 14:36:03 +0200 Subject: [PATCH] re PR target/85832 ([AVX512] possible shorter code when comparing with vector of zeros) PR target/85832 * config/i386/sse.md (_eq3_1): Add (=Yk,v,C) variant using vptestm insn. Use TARGET_AVX512BW in test instead of TARGET_AVX512F for VI12_AVX512VL iterator. * gcc.target/i386/avx512f-pr85832.c: New test. * gcc.target/i386/avx512vl-pr85832.c: New test. * gcc.target/i386/avx512bw-pr85832.c: New test. * gcc.target/i386/avx512vlbw-pr85832.c: New test. From-SVN: r260756 --- gcc/ChangeLog | 7 +++++ gcc/config/i386/sse.md | 22 +++++++------ gcc/testsuite/ChangeLog | 8 +++++ .../gcc.target/i386/avx512bw-pr85832.c | 19 ++++++++++++ .../gcc.target/i386/avx512f-pr85832.c | 19 ++++++++++++ .../gcc.target/i386/avx512vl-pr85832.c | 31 +++++++++++++++++++ .../gcc.target/i386/avx512vlbw-pr85832.c | 31 +++++++++++++++++++ 7 files changed, 128 insertions(+), 9 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512bw-pr85832.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512f-pr85832.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-pr85832.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vlbw-pr85832.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4d8410e9a03..adaa0b4d9bc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2018-05-25 Jakub Jelinek + + PR target/85832 + * config/i386/sse.md (_eq3_1): + Add (=Yk,v,C) variant using vptestm insn. Use TARGET_AVX512BW + in test instead of TARGET_AVX512F for VI12_AVX512VL iterator. + 2018-05-25 Richard Biener * tree-vect-data-refs.c (vect_find_stmt_data_reference): New diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index afe18d61973..a11180ff4ab 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -11207,26 +11207,30 @@ "ix86_fixup_binary_operands_no_copy (EQ, mode, operands);") (define_insn "_eq3_1" - [(set (match_operand: 0 "register_operand" "=Yk") + [(set (match_operand: 0 "register_operand" "=Yk,Yk") (unspec: - [(match_operand:VI12_AVX512VL 1 "nonimmediate_operand" "%v") - (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm")] + [(match_operand:VI12_AVX512VL 1 "vector_move_operand" "%v,v") + (match_operand:VI12_AVX512VL 2 "vector_move_operand" "vm,C")] UNSPEC_MASKED_EQ))] - "TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))" - "vpcmpeq\t{%2, %1, %0|%0, %1, %2}" + "TARGET_AVX512BW && !(MEM_P (operands[1]) && MEM_P (operands[2]))" + "@ + vpcmpeq\t{%2, %1, %0|%0, %1, %2} + vptestm\t{%1, %1, %0|%0, %1, %1}" [(set_attr "type" "ssecmp") (set_attr "prefix_extra" "1") (set_attr "prefix" "evex") (set_attr "mode" "")]) (define_insn "_eq3_1" - [(set (match_operand: 0 "register_operand" "=Yk") + [(set (match_operand: 0 "register_operand" "=Yk,Yk") (unspec: - [(match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v") - (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "vm")] + [(match_operand:VI48_AVX512VL 1 "vector_move_operand" "%v,v") + (match_operand:VI48_AVX512VL 2 "vector_move_operand" "vm,C")] UNSPEC_MASKED_EQ))] "TARGET_AVX512F && !(MEM_P (operands[1]) && MEM_P (operands[2]))" - "vpcmpeq\t{%2, %1, %0|%0, %1, %2}" + "@ + vpcmpeq\t{%2, %1, %0|%0, %1, %2} + vptestm\t{%1, %1, %0|%0, %1, %1}" [(set_attr "type" "ssecmp") (set_attr "prefix_extra" "1") (set_attr "prefix" "evex") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7d7fc8cb421..62862e5b3f7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2018-05-25 Jakub Jelinek + + PR target/85832 + * gcc.target/i386/avx512f-pr85832.c: New test. + * gcc.target/i386/avx512vl-pr85832.c: New test. + * gcc.target/i386/avx512bw-pr85832.c: New test. + * gcc.target/i386/avx512vlbw-pr85832.c: New test. + 2018-05-25 Bin Cheng PR tree-optimization/85720 diff --git a/gcc/testsuite/gcc.target/i386/avx512bw-pr85832.c b/gcc/testsuite/gcc.target/i386/avx512bw-pr85832.c new file mode 100644 index 00000000000..40e4a2a47e9 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512bw-pr85832.c @@ -0,0 +1,19 @@ +/* PR target/85832 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512bw -mno-avx512vl -masm=att" } */ +/* { dg-final { scan-assembler-times {\mvptestmb\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvptestmw\M} 1 } } */ + +#include + +int +f1 (__m512i x) +{ + return _mm512_cmpeq_epi8_mask (x, _mm512_setzero_si512 ()); +} + +int +f2 (__m512i x) +{ + return _mm512_cmpeq_epi16_mask (x, _mm512_setzero_si512 ()); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512f-pr85832.c b/gcc/testsuite/gcc.target/i386/avx512f-pr85832.c new file mode 100644 index 00000000000..98b71405ee0 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-pr85832.c @@ -0,0 +1,19 @@ +/* PR target/85832 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512f -mno-avx512vl -mno-avx512bw -masm=att" } */ +/* { dg-final { scan-assembler-times {\mvptestmd\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvptestmq\M} 1 } } */ + +#include + +int +f1 (__m512i x) +{ + return _mm512_cmpeq_epi32_mask (x, _mm512_setzero_si512 ()); +} + +int +f2 (__m512i x) +{ + return _mm512_cmpeq_epi64_mask (x, _mm512_setzero_si512 ()); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-pr85832.c b/gcc/testsuite/gcc.target/i386/avx512vl-pr85832.c new file mode 100644 index 00000000000..6eb7178124b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-pr85832.c @@ -0,0 +1,31 @@ +/* PR target/85832 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mno-avx512bw -masm=att" } */ +/* { dg-final { scan-assembler-times {\mvptestmd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvptestmq\M} 2 } } */ + +#include + +int +f1 (__m256i x) +{ + return _mm256_cmpeq_epi32_mask (x, _mm256_setzero_si256 ()); +} + +int +f2 (__m256i x) +{ + return _mm256_cmpeq_epi64_mask (x, _mm256_setzero_si256 ()); +} + +int +f3 (__m128i x) +{ + return _mm_cmpeq_epi32_mask (x, _mm_setzero_si128 ()); +} + +int +f4 (__m128i x) +{ + return _mm_cmpeq_epi64_mask (x, _mm_setzero_si128 ()); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vlbw-pr85832.c b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr85832.c new file mode 100644 index 00000000000..6fbdf5aec71 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vlbw-pr85832.c @@ -0,0 +1,31 @@ +/* PR target/85832 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mavx512bw -masm=att" } */ +/* { dg-final { scan-assembler-times {\mvptestmb\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvptestmw\M} 2 } } */ + +#include + +int +f1 (__m256i x) +{ + return _mm256_cmpeq_epi8_mask (x, _mm256_setzero_si256 ()); +} + +int +f2 (__m256i x) +{ + return _mm256_cmpeq_epi16_mask (x, _mm256_setzero_si256 ()); +} + +int +f3 (__m128i x) +{ + return _mm_cmpeq_epi8_mask (x, _mm_setzero_si128 ()); +} + +int +f4 (__m128i x) +{ + return _mm_cmpeq_epi16_mask (x, _mm_setzero_si128 ()); +} -- 2.30.2