From b62f9f9bc81b84de4388cf9bce07ba1098d85e0e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 1 Mar 2020 15:07:53 +0000 Subject: [PATCH] remove comment --, add comment header --- openpower/isatables/extra.csv | 2 +- openpower/isatables/major.csv | 2 +- openpower/isatables/minor_31.csv | 2 +- openpower/isatables/minor_58.csv | 8 ++++---- openpower/isatables/minor_62.csv | 6 +++--- 5 files changed, 10 insertions(+), 10 deletions(-) diff --git a/openpower/isatables/extra.csv b/openpower/isatables/extra.csv index a122a5ab6..a1f10f259 100644 --- a/openpower/isatables/extra.csv +++ b/openpower/isatables/extra.csv @@ -1,4 +1,4 @@ -opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe +opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe, comment attn,ALU,OP_ILLEGAL,NONE,NONE,NONE,NONE,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,1,attn nop,ALU,OP_NOP,NONE,NONE,NONE,NONE,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,nop sim_cfg,ALU,OP_SIM_CONFIG,NONE,NONE,NONE,RT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,1,sim_cfg diff --git a/openpower/isatables/major.csv b/openpower/isatables/major.csv index f58784a6b..f9dca580e 100644 --- a/openpower/isatables/major.csv +++ b/openpower/isatables/major.csv @@ -1,4 +1,4 @@ -opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe +opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment 12,ALU,OP_ADD,RA,CONST_SI,NONE,RT,0,0,0,0,ZERO,1,NONE,0,0,0,0,0,0,NONE,0,0,addic 13,ALU,OP_ADD,RA,CONST_SI,NONE,RT,0,0,0,0,ZERO,1,NONE,0,0,0,0,0,0,ONE,0,0,addic. 14,ALU,OP_ADD,RA_OR_ZERO,CONST_SI,NONE,RT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,addi diff --git a/openpower/isatables/minor_31.csv b/openpower/isatables/minor_31.csv index 28897e8ad..9583d8d6e 100644 --- a/openpower/isatables/minor_31.csv +++ b/openpower/isatables/minor_31.csv @@ -1,4 +1,4 @@ -opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe +opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry out,ldst len,BR,sgn ext,upd,rsrv,32b,sgn,rc,lk,sgl pipe,comment 0b0100001010,ALU,OP_ADD,RA,RB,NONE,RT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,add 0b1100001010,ALU,OP_ADD,RA,RB,NONE,RT,0,0,0,0,ZERO,0,NONE,0,0,0,0,0,0,RC,0,0,addo 0b0000001010,ALU,OP_ADD,RA,RB,NONE,RT,0,0,0,0,ZERO,1,NONE,0,0,0,0,0,0,RC,0,0,addc diff --git a/openpower/isatables/minor_58.csv b/openpower/isatables/minor_58.csv index 8036e5018..a420143c2 100644 --- a/openpower/isatables/minor_58.csv +++ b/openpower/isatables/minor_58.csv @@ -1,4 +1,4 @@ -opcode,unit,internalop,in1,in2,in3,out,CRin,CRout,invA,invout,cryin,cryout,ldstlen,BR,sgnext,upd,rsrv,32b,sgn,rc,lk,sglpipe -0,LDST,OP_LOAD,RA_OR_ZERO,CONST_DS,NONE,RT,0,0,0,0,ZERO,0,is8B,0,0,0,0,0,0,NONE,0,1,--ld -1,LDST,OP_LOAD,RA_OR_ZERO,CONST_DS,NONE,RT,0,0,0,0,ZERO,0,is8B,0,0,1,0,0,0,NONE,0,1,--ldu -2,LDST,OP_LOAD,RA_OR_ZERO,CONST_DS,NONE,RT,0,0,0,0,ZERO,0,is4B,0,1,0,0,0,0,NONE,0,1,--lwa +opcode,unit,internalop,in1,in2,in3,out,CRin,CRout,invA,invout,cryin,cryout,ldstlen,BR,sgnext,upd,rsrv,32b,sgn,rc,lk,sglpipe,comment +0,LDST,OP_LOAD,RA_OR_ZERO,CONST_DS,NONE,RT,0,0,0,0,ZERO,0,is8B,0,0,0,0,0,0,NONE,0,1,ld +1,LDST,OP_LOAD,RA_OR_ZERO,CONST_DS,NONE,RT,0,0,0,0,ZERO,0,is8B,0,0,1,0,0,0,NONE,0,1,ldu +2,LDST,OP_LOAD,RA_OR_ZERO,CONST_DS,NONE,RT,0,0,0,0,ZERO,0,is4B,0,1,0,0,0,0,NONE,0,1,lwa diff --git a/openpower/isatables/minor_62.csv b/openpower/isatables/minor_62.csv index eababa404..d8ce745b8 100644 --- a/openpower/isatables/minor_62.csv +++ b/openpower/isatables/minor_62.csv @@ -1,3 +1,3 @@ -opcode,unit,internalop,in1,in2,in3,out,CRin,CRout,invA,invout,cryin,cryout,ldstlen,BR,sgnext,upd,rsrv,32b,sgn,rc,lk,sglpipe -0,LDST,OP_STORE,RA_OR_ZERO,CONST_DS,RS,NONE,0,0,0,0,ZERO,0,is8B,0,0,0,0,0,0,NONE,0,1,--std -1,LDST,OP_STORE,RA_OR_ZERO,CONST_DS,RS,NONE,0,0,0,0,ZERO,0,is8B,0,0,1,0,0,0,NONE,0,1,--stdu +opcode,unit,internalop,in1,in2,in3,out,CRin,CRout,invA,invout,cryin,cryout,ldstlen,BR,sgnext,upd,rsrv,32b,sgn,rc,lk,sglpipe,comment +0,LDST,OP_STORE,RA_OR_ZERO,CONST_DS,RS,NONE,0,0,0,0,ZERO,0,is8B,0,0,0,0,0,0,NONE,0,1,std +1,LDST,OP_STORE,RA_OR_ZERO,CONST_DS,RS,NONE,0,0,0,0,ZERO,0,is8B,0,0,1,0,0,0,NONE,0,1,stdu -- 2.30.2