From b65a08d04f740bb04db2f4e06728efd1281ff4ec Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 15 Nov 2021 14:20:53 +0000 Subject: [PATCH] add some print statements and comments explaining what the heck is going on --- src/spec/testing_stage1.py | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/src/spec/testing_stage1.py b/src/spec/testing_stage1.py index 5349ee9..a972ce5 100644 --- a/src/spec/testing_stage1.py +++ b/src/spec/testing_stage1.py @@ -243,8 +243,20 @@ class ASICPlatform(TemplatedPlatform): print (" get_input", pin, "port", port, port.layout) if pin.name not in ['clk_0', 'rst_0']: # sigh - pad = self.padlookup[pin.name] - print (" pad", pad) + (res, pin, port, attrs) = self.padlookup[pin.name] + io = self.jtag.ios[pin.name] + print (" pad", res, pin, port, attrs) + print (" pin", pin.layout) + print (" jtag", io.core.layout, io.pad.layout) + # Layout basically contains the list of objects (and sizes) + # so a Layout of [('i', 1)] means, "this object has a Signal + # named i and it is of length 1". threfore: + # * pin has a pin.i of length 1 + # * io.core has an io.core.i of length 1 + # * io.pad has an io.pad.i of length 1 + # Your Mission, Should You Choose To Accept It, is to + # work out which bleeding way round what the hell is + # connected to what. m = Module() m.d.comb += pin.i.eq(self._invert_if(invert, port)) return m -- 2.30.2