From b689de3444ab053e2b81022537ae31fb2c38b82d Mon Sep 17 00:00:00 2001 From: Gert Wollny Date: Wed, 6 May 2020 23:25:03 +0200 Subject: [PATCH] r600: Lower int64 ops from TGSI-to-NIR shaders too r600 uses a TGSI shaders with 64 bit ints for a query compute shader. v2: Use screen version of tgsi_to_nir and fix compile error Signed-off-by: Gert Wollny Reviewed-by: Reviewed-by: Dave Airlie Part-of: --- src/gallium/drivers/r600/r600_shader.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 7784f35c317..346498cd98a 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -194,9 +194,18 @@ int r600_pipe_shader_create(struct pipe_context *ctx, goto error; } } else { - if (sel->ir_type == PIPE_SHADER_IR_TGSI) - sel->nir = tgsi_to_nir_noscreen(sel->tokens, &r600_nir_options); + if (sel->ir_type == PIPE_SHADER_IR_TGSI) { + sel->nir = tgsi_to_nir(sel->tokens, ctx->screen, true); + /* Lower int64 ops because we have some r600 build-in shaders that use it */ + if (!ctx->screen->get_param(ctx->screen, PIPE_CAP_DOUBLES)) { + NIR_PASS_V(sel->nir, nir_lower_regs_to_ssa); + NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar, NULL, NULL); + NIR_PASS_V(sel->nir, nir_lower_int64, ~0); + NIR_PASS_V(sel->nir, nir_opt_vectorize); + } + } nir_tgsi_scan_shader(sel->nir, &sel->info, true); + r = r600_shader_from_nir(rctx, shader, &key); if (r) { fprintf(stderr, "--Failed shader--------------------------------------------------\n"); -- 2.30.2