From b6a5c6c45de60531dfd11e926bcfde082452c77b Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 6 Jun 2022 12:10:55 +0100 Subject: [PATCH] --- openpower/sv/remap.mdwn | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/openpower/sv/remap.mdwn b/openpower/sv/remap.mdwn index ff8459e25..fd88d1f5b 100644 --- a/openpower/sv/remap.mdwn +++ b/openpower/sv/remap.mdwn @@ -83,6 +83,22 @@ a 5x4 result: The example may be executed as a unit test and demo, [here](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/test_caller_svp64_matrix.py;h=c15479db9a36055166b6b023c7495f9ca3637333;hb=a17a252e474d5d5bf34026c25a19682e3f2015c3#l94) +# Indexed REMAP + +The purpose of Indexing is to provide a generalised version of +Vector ISA "Permute" instructions, such as VSX `vperm`. The +Indexing is abstracted out and may be applied to much more +than an element move/copy, and is not limited for example +to the number of bytes that can fit into a VSX register. +Indexing may be applied to LD/ST (even on Indexed LD/ST +instructions such as `sv.lbzx`), arithmetic operations, +extsw: there is no artificial limit. + +The only major caveat is that the registers to be used as +Indices must not be modified by any instruction during +the time they are used. + + # REMAP SPR | 0 | 2 | 4 | 6 | 8 | 10.14 | 15..23 | -- 2.30.2