From b7153e2a64bdb88cebe96e59b24d5597a3a42205 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Thu, 31 Jan 2013 07:49:13 -0500 Subject: [PATCH] mem: Separate out the different cases for DRAM bus busy time This patch changes how the data bus busy time is calculated such that it is delayed to the actual scheduling time of the request as opposed to being done as soon as possible. This patch changes a bunch of statistics, and the stats update is bundled together with the introruction of tFAW/tTAW and the named DRAM configurations like DDR3 and LPDDR2. --- src/mem/simple_dram.cc | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/src/mem/simple_dram.cc b/src/mem/simple_dram.cc index 62825d139..305a7bcaf 100644 --- a/src/mem/simple_dram.cc +++ b/src/mem/simple_dram.cc @@ -299,13 +299,16 @@ SimpleDRAM::processWriteEvent() if (pageMgmt == Enums::open) { bank.openRow = dram_pkt->row; - bank.freeAt = schedTime + tBURST + accessLat; + bank.freeAt = schedTime + tBURST + std::max(accessLat, tCL); + busBusyUntil = bank.freeAt - tCL; - if (!rowHitFlag) + if (!rowHitFlag) { bank.tRASDoneAt = bank.freeAt + tRP; - + busBusyUntil = bank.freeAt - tCL - tRCD; + } } else if (pageMgmt == Enums::close) { bank.freeAt = schedTime + tBURST + accessLat + tRP + tRP; + busBusyUntil = bank.freeAt - tRP - tRP - tCL - tRCD; DPRINTF(DRAMWR, "processWriteEvent::bank.freeAt for " "banks_id %d is %lld\n", dram_pkt->rank * banksPerRank + dram_pkt->bank, @@ -313,13 +316,8 @@ SimpleDRAM::processWriteEvent() } else panic("Unknown page management policy chosen\n"); - // @todo: As of now, write goes on the databus asap, maybe - // be held up at bank. May want to change it to delay the - // schedTime itself. - busBusyUntil = schedTime + tBURST; DPRINTF(DRAMWR,"Done writing to address %lld\n",dram_pkt->addr); - DPRINTF(DRAMWR,"schedtime is %lld, tBURST is %lld, " "busbusyuntil is %lld\n", schedTime, tBURST, busBusyUntil); @@ -781,7 +779,8 @@ SimpleDRAM::estimateLatency(DRAMPacket* dram_pkt, Tick inTime) } else panic("No page management policy chosen\n"); - DPRINTF(DRAM, "Returning %lld from estimateLatency()\n",accLat); + DPRINTF(DRAM, "Returning < %lld, %lld > from estimateLatency()\n", + bankLat, accLat); return make_pair(bankLat, accLat); } -- 2.30.2