From b72b1c298b49fad325e93e125b011c8a55780262 Mon Sep 17 00:00:00 2001 From: Jan Hubicka Date: Thu, 3 Oct 2002 23:37:17 +0200 Subject: [PATCH] * i386.c (athlon_cost): Fix the move costs. From-SVN: r57791 --- gcc/ChangeLog | 4 ++++ gcc/config/i386/i386.c | 18 +++++++++--------- 2 files changed, 13 insertions(+), 9 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 63612873510..0850ea3fd91 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +Thu Oct 3 23:35:51 CEST 2002 Jan Hubicka + + * i386.c (athlon_cost): Fix the move costs. + Thu Oct 3 23:20:58 CEST 2002 Jan Hubicka * final.c (final): Use symbol name as function name for profiling. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index b018c9eced7..f912fa94d38 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -285,25 +285,25 @@ struct processor_costs athlon_cost = { 8, /* "large" insn */ 9, /* MOVE_RATIO */ 4, /* cost for loading QImode using movzbl */ - {4, 5, 4}, /* cost of loading integer registers + {3, 4, 3}, /* cost of loading integer registers in QImode, HImode and SImode. Relative to reg-reg move (2). */ - {2, 3, 2}, /* cost of storing integer registers */ + {3, 4, 3}, /* cost of storing integer registers */ 4, /* cost of reg,reg fld/fst */ - {6, 6, 20}, /* cost of loading fp registers + {4, 4, 12}, /* cost of loading fp registers in SFmode, DFmode and XFmode */ - {4, 4, 16}, /* cost of loading integer registers */ + {6, 6, 8}, /* cost of loading integer registers */ 2, /* cost of moving MMX register */ - {2, 2}, /* cost of loading MMX registers + {4, 4}, /* cost of loading MMX registers in SImode and DImode */ - {2, 2}, /* cost of storing MMX registers + {4, 4}, /* cost of storing MMX registers in SImode and DImode */ 2, /* cost of moving SSE register */ - {2, 2, 8}, /* cost of loading SSE registers + {4, 4, 6}, /* cost of loading SSE registers in SImode, DImode and TImode */ - {2, 2, 8}, /* cost of storing SSE registers + {4, 4, 5}, /* cost of storing SSE registers in SImode, DImode and TImode */ - 6, /* MMX or SSE register to integer */ + 5, /* MMX or SSE register to integer */ 64, /* size of prefetch block */ 6, /* number of parallel prefetches */ }; -- 2.30.2