From b793981873154436b316d56a861b2893d8b3c2a8 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 25 Mar 2021 14:43:46 +0000 Subject: [PATCH] --- openpower/ISA_WG/Board_letter_26mar2021.mdwn | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 openpower/ISA_WG/Board_letter_26mar2021.mdwn diff --git a/openpower/ISA_WG/Board_letter_26mar2021.mdwn b/openpower/ISA_WG/Board_letter_26mar2021.mdwn new file mode 100644 index 000000000..bcfa3882a --- /dev/null +++ b/openpower/ISA_WG/Board_letter_26mar2021.mdwn @@ -0,0 +1,15 @@ +# Draft letter + +* letter to OpenPOWER Foundation Board of Directors +* purpose: dialog on how LibreSOC and RED Semiconductor propose extensions + +edit history: + +* 25mar2021 first revision + +# Contents + +Dear OPF Board, + +As you know the LibreSOC team have been working for over 3 years on a massive conceptual upgrade to the OpenPOWER ISA, based on Cray-Style Vectors, which will modernise it for today's 3D and VPU workloads, with an incidental side-effect of upgrading it for future supercomputing needs. RISC-V has RVV, ARM has SVE2, x86 has AVX512, whilst OpenPOWER has an out-of-date SIMD ISA. It goes without saying that over the decades, SIMD has been demonstrated to be harmful. +https://www.sigarch.org/simd-instructions-considered-harmful/ -- 2.30.2