From b7c4b06329859cdf237a20b9b52bc5a3fa42d4d7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 10 Jun 2020 14:25:27 +0100 Subject: [PATCH] TODO on RA immediate-zero mode --- src/soc/fu/test/common.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/fu/test/common.py b/src/soc/fu/test/common.py index 607b7074..9a97652e 100644 --- a/src/soc/fu/test/common.py +++ b/src/soc/fu/test/common.py @@ -23,6 +23,7 @@ class TestCase: class ALUHelpers: def get_sim_int_ra(res, sim, dec2): + # TODO: immediate RA zero reg1_ok = yield dec2.e.read_reg1.ok if reg1_ok: data1 = yield dec2.e.read_reg1.data @@ -35,6 +36,7 @@ class ALUHelpers: res['rb'] = sim.gpr(data).value def set_int_ra(alu, dec2, inp): + # TODO: immediate RA zero. if 'ra' in inp: yield alu.p.data_i.ra.eq(inp['ra']) else: -- 2.30.2