From b823b06fc686241841b08ed5370d01bedb37e1c6 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 22 May 2020 10:46:45 +0100 Subject: [PATCH] comment tidyup --- src/soc/fu/branch/main_stage.py | 8 +++--- src/soc/fu/logical/bpermd.py | 47 +++++++++++---------------------- 2 files changed, 19 insertions(+), 36 deletions(-) diff --git a/src/soc/fu/branch/main_stage.py b/src/soc/fu/branch/main_stage.py index 3d308a53..723182f4 100644 --- a/src/soc/fu/branch/main_stage.py +++ b/src/soc/fu/branch/main_stage.py @@ -124,20 +124,18 @@ class BranchMainStage(PipeModBase): comb += br_imm_addr.eq(spr1) # SPR1 is set by decode unit comb += br_taken.eq(bc_taken) - ###### output next instruction address ##### - + # output next instruction address comb += nia_o.data.eq(br_addr) comb += nia_o.ok.eq(br_taken) - ###### link register - only activate on operations marked as "lk" ##### - + # link register - only activate on operations marked as "lk" with m.If(lk): # ctx.op.lk is the AND of the insn LK field *and* whether the # op is to "listen" to the link field comb += lr_o.data.eq(cia + 4) comb += lr_o.ok.eq(1) - ###### and context ##### + # and context comb += self.o.ctx.eq(self.i.ctx) return m diff --git a/src/soc/fu/logical/bpermd.py b/src/soc/fu/logical/bpermd.py index 1fc50e97..f9d6c102 100644 --- a/src/soc/fu/logical/bpermd.py +++ b/src/soc/fu/logical/bpermd.py @@ -17,45 +17,30 @@ class Bpermd(Elaboratable): else permi[i] ← 0 RA ←56[0] || perm[0:7] - Eight permuted bits are produced. - For each permutedbit i where i - ranges from 0 to 7 and for each - byte i of RS, do the following. - - If byte i of RS is less than - 64, permuted bit i is set to - the bit of RB specified by - byte i of RS; otherwise + Eight permuted bits are produced. For each permutedbit i where i + ranges from 0 to 7 and for each byte i of RS, do the following. + + If byte i of RS is less than 64, permuted bit i is set to + the bit of RB specified by byte i of RS; otherwise permuted bit i is set to 0. - The permuted bits are placed in - the least-significant byte of RA, - and the remaining bits are filled - with 0s. + The permuted bits are placed in the least-significant byte of RA, + and the remaining bits are filled with 0s. Special Registers Altered: None Programming Note: - The fact that the permuted bit is - 0 if the corresponding index value - exceeds 63 permits the permuted - bits to be selected from a 128-bit - quantity, using a single index - register. For example, assume that - the 128-bit quantity Q, from which - the permuted bits are to be - selected, is in registers r2 - (high-order 64 bits of Q) and r3 - (low-order 64 bits of Q), that the - index values are in register r1, - with each byte of r1 containing a - value in the range 0:127, and that - each byte of register r4 contains - the value 64. The following code - sequence selects eight permuted - bits from Q and places them into + The fact that the permuted bit is 0 if the corresponding index value + exceeds 63 permits the permuted bits to be selected from a 128-bit + quantity, using a single index register. For example, assume that + the 128-bit quantity Q, from which the permuted bits are to be + selected, is in registers r2 (high-order 64 bits of Q) and r3 + (low-order 64 bits of Q), that the index values are in register r1, + with each byte of r1 containing a value in the range 0:127, and that + each byte of register r4 contains the value 64. The following code + sequence selects eight permuted bits from Q and places them into the low-order byteof r6. bpermd r6,r1,r2 # select from high-order half of Q -- 2.30.2