From b853346e2c2ea98e35c6043712303a5fc8b87dd8 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Wed, 3 Jan 2018 10:42:08 +0000 Subject: [PATCH] x86: don't use AVX512BW vmovdqu variants without -mavx512bw Simply mirror the MODE_XI logic of handling unaligned operands in mov_internal into MODE_TI / MODE_OI handling. gcc/ 2018-01-03 Jan Beulich * sse.md (mov_internal): Tighten condition for when to use vmovdqu for TI and OI modes. gcc/testsuite/ 2018-01-03 Jan Beulich * gcc.target/i386/avx512vl-no-vmovdqu8.c, gcc.target/i386/avx512vl-no-vmovdqu16.c: New. From-SVN: r256170 --- gcc/ChangeLog | 5 ++++ gcc/config/i386/sse.md | 10 ++++++-- gcc/testsuite/ChangeLog | 5 ++++ .../gcc.target/i386/avx512vl-no-vmovdqu16.c | 24 +++++++++++++++++++ .../gcc.target/i386/avx512vl-no-vmovdqu8.c | 24 +++++++++++++++++++ 5 files changed, 66 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 812a0b57039..d9c4c6adf97 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-01-03 Jan Beulich + + * sse.md (mov_internal): Tighten condition for when to use + vmovdqu for TI and OI modes. + 2018-01-03 Jakub Jelinek Update copyright years. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index acaada28a51..b0ba91e6b84 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1021,8 +1021,14 @@ case MODE_TI: if (misaligned_operand (operands[0], mode) || misaligned_operand (operands[1], mode)) - return TARGET_AVX512VL ? "vmovdqu\t{%1, %0|%0, %1}" - : "%vmovdqu\t{%1, %0|%0, %1}"; + return TARGET_AVX512VL + && (mode == V4SImode + || mode == V2DImode + || mode == V8SImode + || mode == V4DImode + || TARGET_AVX512BW) + ? "vmovdqu\t{%1, %0|%0, %1}" + : "%vmovdqu\t{%1, %0|%0, %1}"; else return TARGET_AVX512VL ? "vmovdqa64\t{%1, %0|%0, %1}" : "%vmovdqa\t{%1, %0|%0, %1}"; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3a5b77083a6..2c179b14964 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-01-03 Jan Beulich + + * gcc.target/i386/avx512vl-no-vmovdqu8.c, + gcc.target/i386/avx512vl-no-vmovdqu16.c: New. + 2018-01-03 Jakub Jelinek Update copyright years. diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c new file mode 100644 index 00000000000..29b3141ad9b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu16.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mno-avx512bw" } */ + +typedef unsigned int __attribute__((mode(HI), vector_size(16))) v8hi_t; +typedef unsigned int __attribute__((mode(HI), vector_size(32))) v16hi_t; + +struct s8hi { + int i; + v8hi_t __attribute__((packed)) v; +}; +struct s16hi { + int i; + v16hi_t __attribute__((packed)) v; +}; + +void f8hi(struct s8hi*p1, const struct s8hi*p2) { + p1->v += p2->v; +} + +void f16hi(struct s16hi*p1, const struct s16hi*p2) { + p1->v += p2->v; +} + +/* { dg-final { scan-assembler-not "^\[ \t\]*vmovdq\[au\](8|16)" } } */ diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c new file mode 100644 index 00000000000..f48d7737ea8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-no-vmovdqu8.c @@ -0,0 +1,24 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vl -mno-avx512bw" } */ + +typedef unsigned int __attribute__((mode(QI), vector_size(16))) v16qi_t; +typedef unsigned int __attribute__((mode(QI), vector_size(32))) v32qi_t; + +struct s16qi { + int i; + v16qi_t __attribute__((packed)) v; +}; +struct s32qi { + int i; + v32qi_t __attribute__((packed)) v; +}; + +void f16qi(struct s16qi*p1, const struct s16qi*p2) { + p1->v += p2->v; +} + +void f32qi(struct s32qi*p1, const struct s32qi*p2) { + p1->v += p2->v; +} + +/* { dg-final { scan-assembler-not "^\[ \t\]*vmovdq\[au\](8|16)" } } */ -- 2.30.2