From b934716bd8942a0077e6aa513bd32e52e5acf403 Mon Sep 17 00:00:00 2001 From: Neil Roberts Date: Wed, 27 Feb 2019 11:58:18 +0100 Subject: [PATCH] freedreno/ir3: Implement f2b16 and i2b16 Reviewed-by: Rob Clark --- src/freedreno/ir3/ir3_compiler_nir.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index f4ff6a6314a..895ba9771dd 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -385,6 +385,12 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu) create_cov(ctx, src[0], 32, nir_op_f2f16), 16, nir_op_f2f32); break; + case nir_op_f2b16: { + struct ir3_instruction *zero = create_immed_typed(b, 0, TYPE_F16); + dst[0] = ir3_CMPS_F(b, src[0], 0, zero, 0); + dst[0]->cat2.condition = IR3_COND_NE; + break; + } case nir_op_f2b32: dst[0] = ir3_CMPS_F(b, src[0], 0, create_immed(b, fui(0.0)), 0); dst[0]->cat2.condition = IR3_COND_NE; @@ -400,6 +406,12 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu) case nir_op_b2i32: dst[0] = ir3_b2n(b, src[0]); break; + case nir_op_i2b16: { + struct ir3_instruction *zero = create_immed_typed(b, 0, TYPE_S16); + dst[0] = ir3_CMPS_S(b, src[0], 0, zero, 0); + dst[0]->cat2.condition = IR3_COND_NE; + break; + } case nir_op_i2b32: dst[0] = ir3_CMPS_S(b, src[0], 0, create_immed(b, 0), 0); dst[0]->cat2.condition = IR3_COND_NE; -- 2.30.2