From b9697dd820f618ddeb31f9b713bbef43cb11827d Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 16 Jan 2019 01:19:44 -0800 Subject: [PATCH] iris: Fix SO issue with INTEL_DEBUG=reemit, set fewer bits INTEL_DEBUG=reemit was breaking streamout tests, by re-emitting 3DSTATE_SO_BUFFER commands that tell the HW to zero the SO write offsets. We would need to alter them to use 0xFFFFFFFF for the offset. Also, have each upload function only flag bits relevant to its own pipeline. --- src/gallium/drivers/iris/iris_draw.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/iris/iris_draw.c b/src/gallium/drivers/iris/iris_draw.c index 0dbe41a32e4..19df5482f5e 100644 --- a/src/gallium/drivers/iris/iris_draw.c +++ b/src/gallium/drivers/iris/iris_draw.c @@ -87,8 +87,11 @@ iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) if (ice->state.predicate == IRIS_PREDICATE_STATE_DONT_RENDER) return; + /* We can't safely re-emit 3DSTATE_SO_BUFFERS because it may zero the + * write offsets, changing the behavior. + */ if (unlikely(INTEL_DEBUG & DEBUG_REEMIT)) - ice->state.dirty |= ~0ull; + ice->state.dirty |= IRIS_ALL_DIRTY_FOR_RENDER & ~IRIS_DIRTY_SO_BUFFERS; iris_batch_maybe_flush(batch, 1500); @@ -171,7 +174,7 @@ iris_launch_grid(struct pipe_context *ctx, const struct pipe_grid_info *grid) return; if (unlikely(INTEL_DEBUG & DEBUG_REEMIT)) - ice->state.dirty |= ~0ull; + ice->state.dirty |= IRIS_ALL_DIRTY_FOR_COMPUTE; iris_batch_maybe_flush(batch, 1500); -- 2.30.2