From b970597d7f48a68548260e61a410545185b89c96 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 25 Sep 2022 02:22:15 +0100 Subject: [PATCH] --- openpower/sv/overview/discussion.mdwn | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/openpower/sv/overview/discussion.mdwn b/openpower/sv/overview/discussion.mdwn index 83da46cbd..31002d3f6 100644 --- a/openpower/sv/overview/discussion.mdwn +++ b/openpower/sv/overview/discussion.mdwn @@ -290,12 +290,12 @@ let us perform two operations: RA = GPR(2) # r2 in the register numbering-definition, above RB = GPR(3) # r3, again, same numbering definition -Examining the contents of RA is found to be: +Examining the contents of RA and RB is found to be: RA.H0 = 0x0000 RA.H1 = 0x0000 RA.H2 = 0x0008 RA.H3 = 0x0000 - RA = 0x0000_0000_0008_0000 RB.H0 = 0x0000 RB.H1 = 0x0000 RB.H2 = 0x0000 RB.H3 = 0x0200 - RA = 0x0000_0000_0000_0200 + RA = 0x0000_0000_0008_0000 + RB = 0x0000_0000_0000_0200 The reason why **GPR(3)** contains the value 0x200 (1<<9) when it was the 2nd Vector Element being written to is because of @@ -304,3 +304,6 @@ ultimately the regfile must be considered arbitrarily-byte-addressable just like any Memory, and therefore writing to half-word element `e4` starting from **GPR(2)** actually wrote to half-word element `e0` of GPR(3). + + | B0 | B1 | B2 | B3 | B4 | B5 | B6 | B7 | + | r0.b[7] r0.b[5] r0.b[4] r0.b[3] r0.b[2] r0.b[1] r0.b[6] r0.b[0] -- 2.30.2