From b9856fbf3b7ddbe0b77bf984fe7ec4a64ad858bf Mon Sep 17 00:00:00 2001 From: Nanley Chery Date: Fri, 8 Nov 2019 15:11:05 -0800 Subject: [PATCH] i965: Use ISL's access preparation functions Reviewed-by: Jason Ekstrand Part-of: --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 292 +++--------------- 1 file changed, 35 insertions(+), 257 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 2fa9f7dfb81..0f67b6c9a85 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1707,6 +1707,14 @@ intel_miptree_sample_with_hiz(struct brw_context *brw, mt->target != GL_TEXTURE_1D /* gen9+ restriction */); } +static bool +level_has_aux(const struct intel_mipmap_tree *mt, uint32_t level) +{ + return isl_aux_usage_has_hiz(mt->aux_usage) ? + intel_miptree_level_has_hiz(mt, level) : + mt->aux_usage != ISL_AUX_USAGE_NONE && mt->aux_buf; +} + /** * Does the miptree slice have hiz enabled? */ @@ -1805,130 +1813,6 @@ intel_miptree_check_color_resolve(const struct brw_context *brw, (void)layer; } -static enum isl_aux_op -get_ccs_d_resolve_op(enum isl_aux_state aux_state, - enum isl_aux_usage aux_usage, - bool fast_clear_supported) -{ - assert(aux_usage == ISL_AUX_USAGE_NONE || aux_usage == ISL_AUX_USAGE_CCS_D); - - const bool ccs_supported = aux_usage == ISL_AUX_USAGE_CCS_D; - - assert(ccs_supported == fast_clear_supported); - - switch (aux_state) { - case ISL_AUX_STATE_CLEAR: - case ISL_AUX_STATE_PARTIAL_CLEAR: - if (!ccs_supported) - return ISL_AUX_OP_FULL_RESOLVE; - else - return ISL_AUX_OP_NONE; - - case ISL_AUX_STATE_PASS_THROUGH: - return ISL_AUX_OP_NONE; - - case ISL_AUX_STATE_RESOLVED: - case ISL_AUX_STATE_AUX_INVALID: - case ISL_AUX_STATE_COMPRESSED_CLEAR: - case ISL_AUX_STATE_COMPRESSED_NO_CLEAR: - break; - } - - unreachable("Invalid aux state for CCS_D"); -} - -static enum isl_aux_op -get_ccs_e_resolve_op(enum isl_aux_state aux_state, - enum isl_aux_usage aux_usage, - bool fast_clear_supported) -{ - /* CCS_E surfaces can be accessed as CCS_D if we're careful. */ - assert(aux_usage == ISL_AUX_USAGE_NONE || - aux_usage == ISL_AUX_USAGE_CCS_D || - aux_usage == ISL_AUX_USAGE_CCS_E); - - if (aux_usage == ISL_AUX_USAGE_CCS_D) - assert(fast_clear_supported); - - switch (aux_state) { - case ISL_AUX_STATE_CLEAR: - case ISL_AUX_STATE_PARTIAL_CLEAR: - if (fast_clear_supported) - return ISL_AUX_OP_NONE; - else if (aux_usage == ISL_AUX_USAGE_CCS_E) - return ISL_AUX_OP_PARTIAL_RESOLVE; - else - return ISL_AUX_OP_FULL_RESOLVE; - - case ISL_AUX_STATE_COMPRESSED_CLEAR: - if (aux_usage != ISL_AUX_USAGE_CCS_E) - return ISL_AUX_OP_FULL_RESOLVE; - else if (!fast_clear_supported) - return ISL_AUX_OP_PARTIAL_RESOLVE; - else - return ISL_AUX_OP_NONE; - - case ISL_AUX_STATE_COMPRESSED_NO_CLEAR: - if (aux_usage != ISL_AUX_USAGE_CCS_E) - return ISL_AUX_OP_FULL_RESOLVE; - else - return ISL_AUX_OP_NONE; - - case ISL_AUX_STATE_PASS_THROUGH: - return ISL_AUX_OP_NONE; - - case ISL_AUX_STATE_RESOLVED: - case ISL_AUX_STATE_AUX_INVALID: - break; - } - - unreachable("Invalid aux state for CCS_E"); -} - -static void -intel_miptree_prepare_ccs_access(struct brw_context *brw, - struct intel_mipmap_tree *mt, - uint32_t level, uint32_t layer, - enum isl_aux_usage aux_usage, - bool fast_clear_supported) -{ - enum isl_aux_state aux_state = intel_miptree_get_aux_state(mt, level, layer); - - enum isl_aux_op resolve_op; - if (mt->aux_usage == ISL_AUX_USAGE_CCS_E) { - resolve_op = get_ccs_e_resolve_op(aux_state, aux_usage, - fast_clear_supported); - } else { - assert(mt->aux_usage == ISL_AUX_USAGE_CCS_D); - resolve_op = get_ccs_d_resolve_op(aux_state, aux_usage, - fast_clear_supported); - } - - if (resolve_op != ISL_AUX_OP_NONE) { - intel_miptree_check_color_resolve(brw, mt, level, layer); - brw_blorp_resolve_color(brw, mt, level, layer, resolve_op); - - switch (resolve_op) { - case ISL_AUX_OP_FULL_RESOLVE: - /* The CCS full resolve operation destroys the CCS and sets it to the - * pass-through state. (You can also think of this as being both a - * resolve and an ambiguate in one operation.) - */ - intel_miptree_set_aux_state(brw, mt, level, layer, 1, - ISL_AUX_STATE_PASS_THROUGH); - break; - - case ISL_AUX_OP_PARTIAL_RESOLVE: - intel_miptree_set_aux_state(brw, mt, level, layer, 1, - ISL_AUX_STATE_COMPRESSED_NO_CLEAR); - break; - - default: - unreachable("Invalid resolve op"); - } - } -} - static void intel_miptree_finish_ccs_write(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -2002,36 +1886,6 @@ intel_miptree_finish_ccs_write(struct brw_context *brw, } } -static void -intel_miptree_prepare_mcs_access(struct brw_context *brw, - struct intel_mipmap_tree *mt, - uint32_t layer, - enum isl_aux_usage aux_usage, - bool fast_clear_supported) -{ - assert(aux_usage == ISL_AUX_USAGE_MCS); - - switch (intel_miptree_get_aux_state(mt, 0, layer)) { - case ISL_AUX_STATE_CLEAR: - case ISL_AUX_STATE_COMPRESSED_CLEAR: - if (!fast_clear_supported) { - brw_blorp_mcs_partial_resolve(brw, mt, layer, 1); - intel_miptree_set_aux_state(brw, mt, 0, layer, 1, - ISL_AUX_STATE_COMPRESSED_NO_CLEAR); - } - break; - - case ISL_AUX_STATE_COMPRESSED_NO_CLEAR: - break; /* Nothing to do */ - - case ISL_AUX_STATE_RESOLVED: - case ISL_AUX_STATE_PASS_THROUGH: - case ISL_AUX_STATE_AUX_INVALID: - case ISL_AUX_STATE_PARTIAL_CLEAR: - unreachable("Invalid aux state for MCS"); - } -} - static void intel_miptree_finish_mcs_write(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -2058,62 +1912,6 @@ intel_miptree_finish_mcs_write(struct brw_context *brw, } } -static void -intel_miptree_prepare_hiz_access(struct brw_context *brw, - struct intel_mipmap_tree *mt, - uint32_t level, uint32_t layer, - enum isl_aux_usage aux_usage, - bool fast_clear_supported) -{ - assert(aux_usage == ISL_AUX_USAGE_NONE || aux_usage == ISL_AUX_USAGE_HIZ); - - enum isl_aux_op hiz_op = ISL_AUX_OP_NONE; - switch (intel_miptree_get_aux_state(mt, level, layer)) { - case ISL_AUX_STATE_CLEAR: - case ISL_AUX_STATE_COMPRESSED_CLEAR: - if (aux_usage != ISL_AUX_USAGE_HIZ || !fast_clear_supported) - hiz_op = ISL_AUX_OP_FULL_RESOLVE; - break; - - case ISL_AUX_STATE_COMPRESSED_NO_CLEAR: - if (aux_usage != ISL_AUX_USAGE_HIZ) - hiz_op = ISL_AUX_OP_FULL_RESOLVE; - break; - - case ISL_AUX_STATE_PASS_THROUGH: - case ISL_AUX_STATE_RESOLVED: - break; - - case ISL_AUX_STATE_AUX_INVALID: - if (aux_usage == ISL_AUX_USAGE_HIZ) - hiz_op = ISL_AUX_OP_AMBIGUATE; - break; - - case ISL_AUX_STATE_PARTIAL_CLEAR: - unreachable("Invalid HiZ state"); - } - - if (hiz_op != ISL_AUX_OP_NONE) { - intel_hiz_exec(brw, mt, level, layer, 1, hiz_op); - - switch (hiz_op) { - case ISL_AUX_OP_FULL_RESOLVE: - intel_miptree_set_aux_state(brw, mt, level, layer, 1, - ISL_AUX_STATE_RESOLVED); - break; - - case ISL_AUX_OP_AMBIGUATE: - /* The HiZ resolve operation is actually an ambiguate */ - intel_miptree_set_aux_state(brw, mt, level, layer, 1, - ISL_AUX_STATE_PASS_THROUGH); - break; - - default: - unreachable("Invalid HiZ op"); - } - } -} - static void intel_miptree_finish_hiz_write(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -2168,59 +1966,39 @@ intel_miptree_prepare_access(struct brw_context *brw, enum isl_aux_usage aux_usage, bool fast_clear_supported) { - num_levels = miptree_level_range_length(mt, start_level, num_levels); - - switch (mt->aux_usage) { - case ISL_AUX_USAGE_NONE: - /* Nothing to do */ - break; + const uint32_t clamped_levels = + miptree_level_range_length(mt, start_level, num_levels); + for (uint32_t l = 0; l < clamped_levels; l++) { + const uint32_t level = start_level + l; + if (!level_has_aux(mt, level)) + continue; - case ISL_AUX_USAGE_MCS: - assert(mt->aux_buf); - assert(start_level == 0 && num_levels == 1); const uint32_t level_layers = - miptree_layer_range_length(mt, 0, start_layer, num_layers); + miptree_layer_range_length(mt, level, start_layer, num_layers); for (uint32_t a = 0; a < level_layers; a++) { - intel_miptree_prepare_mcs_access(brw, mt, start_layer + a, - aux_usage, fast_clear_supported); - } - break; - - case ISL_AUX_USAGE_CCS_D: - case ISL_AUX_USAGE_CCS_E: - if (!mt->aux_buf) - return; - - for (uint32_t l = 0; l < num_levels; l++) { - const uint32_t level = start_level + l; - const uint32_t level_layers = - miptree_layer_range_length(mt, level, start_layer, num_layers); - for (uint32_t a = 0; a < level_layers; a++) { - intel_miptree_prepare_ccs_access(brw, mt, level, - start_layer + a, - aux_usage, fast_clear_supported); + const uint32_t layer = start_layer + a; + const enum isl_aux_state aux_state = + intel_miptree_get_aux_state(mt, level, layer); + const enum isl_aux_op aux_op = + isl_aux_prepare_access(aux_state, aux_usage, fast_clear_supported); + + if (aux_op == ISL_AUX_OP_NONE) { + /* Nothing to do here. */ + } else if (isl_aux_usage_has_mcs(mt->aux_usage)) { + assert(aux_op == ISL_AUX_OP_PARTIAL_RESOLVE); + brw_blorp_mcs_partial_resolve(brw, mt, layer, 1); + } else if (isl_aux_usage_has_hiz(mt->aux_usage)) { + intel_hiz_exec(brw, mt, level, layer, 1, aux_op); + } else { + assert(isl_aux_usage_has_ccs(mt->aux_usage)); + intel_miptree_check_color_resolve(brw, mt, level, layer); + brw_blorp_resolve_color(brw, mt, level, layer, aux_op); } - } - break; - case ISL_AUX_USAGE_HIZ: - assert(mt->aux_buf); - for (uint32_t l = 0; l < num_levels; l++) { - const uint32_t level = start_level + l; - if (!intel_miptree_level_has_hiz(mt, level)) - continue; - - const uint32_t level_layers = - miptree_layer_range_length(mt, level, start_layer, num_layers); - for (uint32_t a = 0; a < level_layers; a++) { - intel_miptree_prepare_hiz_access(brw, mt, level, start_layer + a, - aux_usage, fast_clear_supported); - } + const enum isl_aux_state new_state = + isl_aux_state_transition_aux_op(aux_state, mt->aux_usage, aux_op); + intel_miptree_set_aux_state(brw, mt, level, layer, 1, new_state); } - break; - - default: - unreachable("Invalid aux usage"); } } -- 2.30.2