From b991a865a12e7e2f1fb0d39b731b92a3d496574d Mon Sep 17 00:00:00 2001 From: Geoffrey Keating Date: Fri, 18 Oct 2002 00:30:23 +0000 Subject: [PATCH] rs6000.h (HARD_REGNO_MODE_OK): Allow arbitrary modes in CTR/LR/MQ. * config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Allow arbitrary modes in CTR/LR/MQ. * config/rs6000/rs6000.md (movcc_internal1): Support CCmode moves to/from CTR/LR/MQ. (movsf_hardfloat): Support SFmode moves to/from CTR/LR/MQ. (movsf_softfloat): Likewise. From-SVN: r58267 --- gcc/ChangeLog | 9 +++++++++ gcc/config/rs6000/rs6000.h | 3 +-- gcc/config/rs6000/rs6000.md | 33 +++++++++++++++++++++------------ 3 files changed, 31 insertions(+), 14 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0cbff94f2a3..5ec9c6f1ebb 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2002-10-17 Geoffrey Keating + + * config/rs6000/rs6000.h (HARD_REGNO_MODE_OK): Allow arbitrary modes + in CTR/LR/MQ. + * config/rs6000/rs6000.md (movcc_internal1): Support CCmode moves + to/from CTR/LR/MQ. + (movsf_hardfloat): Support SFmode moves to/from CTR/LR/MQ. + (movsf_softfloat): Likewise. + 2002-10-17 Janis Johnson * Makefile.in (site.exp): Add ALT_CXX_UNDER_TEST and COMPAT_OPTIONS. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 7f4139be88d..40731b8126a 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -903,8 +903,7 @@ extern int rs6000_default_long_calls; : SPE_SIMD_REGNO_P (REGNO) && TARGET_SPE && SPE_VECTOR_MODE (MODE) ? 1 \ : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \ : XER_REGNO_P (REGNO) ? (MODE) == PSImode \ - : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \ - && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \ + : ! INT_REGNO_P (REGNO) ? GET_MODE_SIZE (MODE) <= UNITS_PER_WORD \ : 1) /* Value is 1 if it is a good idea to tie two pseudo registers diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index bc89259d0e7..66ceacf0274 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8349,8 +8349,8 @@ "") (define_insn "*movcc_internal1" - [(set (match_operand:CC 0 "nonimmediate_operand" "=y,x,y,r,r,r,r,m") - (match_operand:CC 1 "nonimmediate_operand" "y,r,r,x,y,r,m,r"))] + [(set (match_operand:CC 0 "nonimmediate_operand" "=y,x,y,r,r,r,cl,q,r,r,m") + (match_operand:CC 1 "nonimmediate_operand" "y,r,r,x,y,r,r,r,h,m,r"))] "register_operand (operands[0], CCmode) || register_operand (operands[1], CCmode)" "@ @@ -8360,10 +8360,13 @@ mfcr %0 mfcr %0\;{rlinm|rlwinm} %0,%0,%f1,0xf0000000 mr %0,%1 + mt%0 %1 + mt%0 %1 + mf%1 %0 {l%U1%X1|lwz%U1%X1} %0,%1 {st%U0%U1|stw%U0%U1} %1,%0" - [(set_attr "type" "cr_logical,cr_logical,cr_logical,cr_logical,cr_logical,*,load,store") - (set_attr "length" "*,*,12,*,8,*,*,*")]) + [(set_attr "type" "cr_logical,cr_logical,cr_logical,cr_logical,cr_logical,*,*,mtjmpr,*,load,store") + (set_attr "length" "4,4,12,4,8,4,4,4,4,4,4")]) ;; For floating-point, we normally deal with the floating-point registers ;; unless -msoft-float is used. The sole exception is that parameter passing @@ -8402,8 +8405,8 @@ }") (define_insn "*movsf_hardfloat" - [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!r,!r") - (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,G,Fn"))] + [(set (match_operand:SF 0 "nonimmediate_operand" "=!r,!r,m,f,f,m,!cl,!q,!r,!r,!r") + (match_operand:SF 1 "input_operand" "r,m,r,f,m,f,r,r,h,G,Fn"))] "(gpc_reg_operand (operands[0], SFmode) || gpc_reg_operand (operands[1], SFmode)) && (TARGET_HARD_FLOAT && TARGET_FPRS)" @@ -8414,19 +8417,25 @@ fmr %0,%1 lfs%U1%X1 %0,%1 stfs%U0%X0 %1,%0 + mt%0 %1 + mt%0 %1 + mf%1 %0 # #" - [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,*") - (set_attr "length" "4,4,4,4,4,4,4,8")]) + [(set_attr "type" "*,load,store,fp,fpload,fpstore,*,mtjmpr,*,*,*") + (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")]) (define_insn "*movsf_softfloat" - [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,m,r,r,r,r,r") - (match_operand:SF 1 "input_operand" "r,m,r,I,L,R,G,Fn"))] + [(set (match_operand:SF 0 "nonimmediate_operand" "=r,cl,q,r,r,m,r,r,r,r,r") + (match_operand:SF 1 "input_operand" "r,r,r,h,m,r,I,L,R,G,Fn"))] "(gpc_reg_operand (operands[0], SFmode) || gpc_reg_operand (operands[1], SFmode)) && (TARGET_SOFT_FLOAT || !TARGET_FPRS)" "@ mr %0,%1 + mt%0 %1 + mt%0 %1 + mf%1 %0 {l%U1%X1|lwz%U1%X1} %0,%1 {st%U0%X0|stw%U0%X0} %1,%0 {lil|li} %0,%1 @@ -8434,8 +8443,8 @@ {cal|la} %0,%a1 # #" - [(set_attr "type" "*,load,store,*,*,*,*,*") - (set_attr "length" "4,4,4,4,4,4,4,8")]) + [(set_attr "type" "*,mtjmpr,*,*,load,store,*,*,*,*,*") + (set_attr "length" "4,4,4,4,4,4,4,4,4,4,8")]) (define_expand "movdf" -- 2.30.2