From b9bf19f9120a8549f66ed480568ca28edd8e7765 Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Fri, 23 Aug 2019 14:20:20 +0200 Subject: [PATCH] Added synthesis target The synth target can be used to analyze the core after synthesis without running P&R. Currently, the only edalize backends that support synthesis without P&R are vivado and icestorm, and icestorm needs yosys built with verific support to parse vhdl. To run synthesis only for a part, run fusesoc run --target=synth --tool=vivado microwatt --part= where part is a valid Xilinx part such as xc7a100tcsg324-1 --- microwatt.core | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/microwatt.core b/microwatt.core index 30354ce..1abc558 100644 --- a/microwatt.core +++ b/microwatt.core @@ -66,6 +66,12 @@ targets: vivado: {part : xc7a200tsbg484-1} toplevel : toplevel + synth: + filesets: [core] + tools: + vivado: {pnr : none} + toplevel: core + parameters: memory_size: datatype : int -- 2.30.2